Big gotchas: poor specs

By: Aaron Spink (aaronspink.delete@this.notearthlink.net), August 25, 2019 2:29 am
Room: Moderated Discussions
Ricardo B (ricardo.b.delete@this.xxxxx.xx) on August 19, 2019 5:40 pm wrote:

> I don't know which exact tool Aaron is using but

Specific tool was the DEC Merlin RTL system that we used for quite a while. By far the best RTL system I've ever used. Significantly better language than Verilog/VHDL or their derivatives with much more robust sets of both primitive data types (memory arrays as an actual baseline type, who'd of thunk it, along with encoders and decoders et al, basically every basic architectural structure was baked in) and significantly more robust support for multi-dimensional arrays and bundles with full multi-dimensional shuffle and striding built in.

All in all, it made for not just much more dense code but generally much more readable code as well. And having effectively all of the building blocks baked in allowed for levels of optimization that just aren't possible in Verilog/VHDL (cause they allow you to do really stupid things that no one should ever do but technically are legal code that have to be handled). Lots of code converted to more than 10:1 LOC when going from Merlin to SystemVerilog. Things got extra painful when you had to deal with grouped signal bundles going to SystemVerilog since it really has nothing even usably close or when dealing with bit twiddling or stripping arrays. Performance wise, Merlin was generally at least an order of magnitude faster in simulation (and for bulk work was even faster still via bit parallel mode).

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            RDRAND issueLinus Torvalds2019/08/11 11:05 AM
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              RDRAND issueGionatan Danti2019/08/11 02:12 PM
            RDRAND issueaaron spink2019/08/12 09:18 AM
      RDRAND issuename2019/08/11 09:35 AM
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