By: none (none.delete@this.none.com), November 4, 2019 6:55 am
Room: Moderated Discussions
Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on November 4, 2019 5:45 am wrote:
> none (none.delete@this.none.com) on November 4, 2019 5:38 am wrote:
> > Why do you go back to more than 30 years ago? That's crap too :-) What about comparing
> > to AArch64 which was in the work at about the same time as RISC-V?
>
> Because AArch64 is not a new ISA, it's an evolution of an older one.
Come on you're more knowledgeable than that. You can tell that of Thumb2 vs ARM. AArch64
is as much an evolution of ARM as RISC-V is an evolution of MIPS.
> It also wasn't "a three
> months project over the summer to design an ISA for academic use" done by a handful of people.
Sorry but being a three-month project does not excuse the state of RISC-V. Quite the
contrary.
> none (none.delete@this.none.com) on November 4, 2019 5:38 am wrote:
> > Why do you go back to more than 30 years ago? That's crap too :-) What about comparing
> > to AArch64 which was in the work at about the same time as RISC-V?
>
> Because AArch64 is not a new ISA, it's an evolution of an older one.
Come on you're more knowledgeable than that. You can tell that of Thumb2 vs ARM. AArch64
is as much an evolution of ARM as RISC-V is an evolution of MIPS.
> It also wasn't "a three
> months project over the summer to design an ISA for academic use" done by a handful of people.
Sorry but being a three-month project does not excuse the state of RISC-V. Quite the
contrary.