RISC-V - incompetitive instruction set compared to ARMv8

By: anon (spam.delete.delete@this.this.spam.com), November 4, 2019 7:03 am
Room: Moderated Discussions
Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on November 4, 2019 5:43 am wrote:
> anon (spam.delete.delete@this.this.spam.com) on November 3, 2019 9:06 am wrote:
> > For an ISA that is so heavily built on extensions the argument "it's too expensive for the absolute low
> > end so we'll never implement it for anything" is very weak. Mul/div isn't in the base ISA either, which
> > is very much in line with the original RISC idea, yet they made an extension for that because the 80s have
> > been over for quite a while. Propose an ISA without mul/div and you'll get laughed out of the door.
>
> There's quite a few microcontrollers around without those, even ARM M0, M0+ and M1 cores don't support
> hardware divides (though they do have limited multiply functionality). Supporting mul/div depends
> on your target application, there's no such thing as a perfect ISA for all applications.

You're missing the point.
Just because making something a mandatory part of the ISA would be a problem for low end implementations is no excuse to ignore it completely and claim that fusion will fix everything.
That's the whole point of extensions.
They've given up on the "single cycle execution" rule because no one would take them seriously without mul/div, yet they insist on 2R/1W with only wild handwaving about fusion removing all the downsides.
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                            Op fusion and superscalar execution do NOT share same hardwareanon2019/11/07 09:37 AM
                            Op fusion and superscalar execution do NOT share same hardwareWilco2019/11/07 12:41 PM
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                reg-reg branchesMichael S2019/11/06 02:37 AM
                  reg-reg branchesWilco2019/11/07 05:55 PM
      RISC-V - incompetitive instruction set compared to ARMv8Montaray Jack2019/11/08 02:38 AM
        RISC-V - incompetitive instruction set compared to ARMv8Gabriele Svelto2019/11/08 07:03 AM
  Risc-V getting real?Konrad Schwarz2019/11/20 08:12 AM
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