Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on November 4, 2019 5:43 am wrote:
> anon (spam.delete.delete@this.this.spam.com) on November 3, 2019 9:06 am wrote:
> > For an ISA that is so heavily built on extensions the argument "it's too expensive for the absolute low
> > end so we'll never implement it for anything" is very weak. Mul/div isn't in the base ISA either, which
> > is very much in line with the original RISC idea, yet they made an extension for that because the 80s have
> > been over for quite a while. Propose an ISA without mul/div and you'll get laughed out of the door.
>
> There's quite a few microcontrollers around without those, even ARM M0, M0+ and M1 cores don't support
> hardware divides (though they do have limited multiply functionality). Supporting mul/div depends
> on your target application, there's no such thing as a perfect ISA for all applications.

I suspect it is not as common now but in the past, microcontroller applications often deliberately avoided multiply, divide, and any other long latency interruptible instructions because they increase interrupt latency. If your microcontroller was intended for these applications, then leaving out an instruction which requires a large area and would not be used anyway makes sense.

I seem to recall that some microcontrollers implemented interruptible multiply and/or divide.