reg-reg branches

By: Michael S (already5chosen.delete@this.yahoo.com), November 6, 2019 2:37 am
Room: Moderated Discussions
Wilco (wilco.dijkstra.delete@this.ntlworld.com) on November 4, 2019 1:31 pm wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on November 4, 2019 10:17 am wrote:
>
> > Then it should be about cmoves.
> > RISC-V conditional branches are among the best in the industry.
>
> I have to disagree there. The branch offsets are too small due to having 2 register
> fields in all conditional branches. There is no backup if the offset is too large -
> even unconditional branches have a significantly smaller range than any other ISA.
>
> Register-immediate comparisons are the most common by far. The zero case is supported via
> the zero register, however it wastes at least 5 bits vs a dedicated branch-if-zero instruction
> (CBZ on AArch64 has a +-1MByte range vs +-4KB). Since comparisons with a non-zero immediate
> still require separate compare and branch instructions, having the reg-reg branch format
> isn't very useful, particularly if it is the only conditional branch format.
>
> This shows there are very good reasons most ISAs settled on using condition codes. They
> require 9-10 bits less compared to reg-reg branch formats, enabling significantly larger
> branch offsets and less encoding space dedicated to conditional branches.
>
> Wilco
>

In specific case of 32-bit fixed-point ISA, I don't see 2 register specifiers as something that prevents decent displacement range.

Altera Nios2 has +/- 32KB coverage and that with 2 LS bits of displacement not used (reserved).

MIPSr6 "compact" reg-reg branches have coverage of +/- 128KB.

RISC-V opted for much shorter coverage (+/- 4KB), but lack of encode space in 32-bit fixed-width form does not look like the real reason for that. I could only guess what is the real reason:
- They wanted conditional branches in exactly the same format as other I-format instructions (why immediate field in I-format is so much shorter than in other MIPS-like instruction sets is a separate question)?
- They thought that 4KB is sufficient, because Patterson's books say so?
- They wanted to leave as much as possible of opcode space for future extensions?
- They wanted maximal compatibility with "compressed" form?
I can invent more guesses, but don't want.

I don't like RISC-V choice from the point of pure aesthetics, but agree with notion that (+/- 4KB) causes very little troubles in practice.
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