By: Maynard Handley (name99.delete@this.name99.org), November 8, 2019 6:00 pm
Room: Moderated Discussions
Brett (ggtgp.delete@this.yahoo.com) on November 8, 2019 2:00 pm wrote:
> anon.1 (abc.delete@this.def.com) on November 7, 2019 9:47 pm wrote:
> > Brett (ggtgp.delete@this.yahoo.com) on November 7, 2019 6:50 pm wrote:
> > > anon.1 (abc.delete@this.def.com) on November 7, 2019 5:39 pm wrote:
> > > > Ronald Maas (ronaldjmaas.delete@this.gmail.com) on November 6, 2019 11:53 pm wrote:
> > > > > anon.1 (abc.delete@this.def.com) on November 6, 2019 9:36 pm wrote:
> > > > > > Doug S (foo.delete@this.bar.bar) on November 6, 2019 11:47 am wrote:
> > > > > > > anon.1 (abc.delete@this.def.com) on November 6, 2019 11:19 am wrote:
> > > > > > > > The whole point of RISC was to make
> > > > > > > > decode simple. Now they want to add complexity in decode because, well, the ISA is oversimplified.
> > > > > > >
> > > > > > >
> > > > > > > The RISC concept was created 40 years ago. Things have changed, designers have a transistor
> > > > > > > budget orders of magnitude larger today so what was appropriate for a decoder in 1980
> > > > > > > shouldn't be a limitation on what is appropriate for a decoder in 2020.
> > > > > >
> > > > > > Pretty damning then that an ISA produced in this decade is
> > > > > > based on design principles aimed at solving problems
> > > > > > dating back 40 years. Seems like the memo didn’t travel into the academic ivory towers. Also, note that
> > > > > > RISC was concerned with pipelining for frequency. They wanted minimum gates in the critical paths. Area
> > > > > > is somewhat of a contributor to it but not the main one. ISA decode complexity is. The more encodings you
> > > > > > have, the more information you store per instruction and the more work you have to do in decode.
> > > > >
> > > > > 5000 year ago we used wheels for transportation. And today we still use wheels
> > > > > for transportation. Does not necessarily means every old idea is bad.
> > > > >
> > > > > Once implementation complexity exceeds a certain level and RISC-V implementations start to
> > > > > implement a full spectrum of extensions, caches, branch prediction, etc. the differences between
> > > > > ARMv8 vs RISC-V start to become less relevant from a technology perspective. Performance,
> > > > > energy efficiency, die area, design and validation efforts for processor implementations targeting
> > > > > higher transistor budgets will be closely matched regardless of the ISA.
> > > > >
> > > > > Because of that, claiming that ARM is superior compared to RISC-V or vice versa, is meaningless.
> > > > > Both are excellent ISAs. It will be the other factors that will drive the implementation choice.
> > > > > Such as licensing terms, maturity of the eco-system, familiarity with certain ISAs, etc. etc.
> > > > >
> > > > > Ronald
> > > >
> > > > The modern wheel bears no resemblance to the mesapotamian wheel other than its shape. The solid wood/stone
> > > > wheel was obsolete centuries ago. Meaningless analogies aside, this old idea (RISC) was a good idea
> > > > for a small window of time. To have the option of designing an ISA from scratch and make decisions
> > > > rooted in constraints from that era reflect ignorance, intransigence, or incompetence. There were plenty
> > > > of lessons to be learned if only one looked hard enough. The excuse of it being a pedagogical tool
> > > > will not fly. This isn’t pedagogy, but indoctrination into the fundamentalist RISC cult. I have the
> > > > same complaint of hennessy and patterson textbooks, but that’s an orthogonal issue.
> > >
> > > The insane babbling robot is back.
> >
> > That is a pretty courageous confession. Respect.
>
> Solid stone wheels have never existed, outside of Flintstone
> cartoon physics, the sort of mistake an AI would make.
AND on Yap :-)
> The rest of the post has an IQ that seems too high to be human.
> This combination triggered my post.
>
> Spinning grain grinding stones do not count as they don’t travel and are at a right angle.
> The side does the grinding and roundness is merely a unimportant side effect.
>
>
> anon.1 (abc.delete@this.def.com) on November 7, 2019 9:47 pm wrote:
> > Brett (ggtgp.delete@this.yahoo.com) on November 7, 2019 6:50 pm wrote:
> > > anon.1 (abc.delete@this.def.com) on November 7, 2019 5:39 pm wrote:
> > > > Ronald Maas (ronaldjmaas.delete@this.gmail.com) on November 6, 2019 11:53 pm wrote:
> > > > > anon.1 (abc.delete@this.def.com) on November 6, 2019 9:36 pm wrote:
> > > > > > Doug S (foo.delete@this.bar.bar) on November 6, 2019 11:47 am wrote:
> > > > > > > anon.1 (abc.delete@this.def.com) on November 6, 2019 11:19 am wrote:
> > > > > > > > The whole point of RISC was to make
> > > > > > > > decode simple. Now they want to add complexity in decode because, well, the ISA is oversimplified.
> > > > > > >
> > > > > > >
> > > > > > > The RISC concept was created 40 years ago. Things have changed, designers have a transistor
> > > > > > > budget orders of magnitude larger today so what was appropriate for a decoder in 1980
> > > > > > > shouldn't be a limitation on what is appropriate for a decoder in 2020.
> > > > > >
> > > > > > Pretty damning then that an ISA produced in this decade is
> > > > > > based on design principles aimed at solving problems
> > > > > > dating back 40 years. Seems like the memo didn’t travel into the academic ivory towers. Also, note that
> > > > > > RISC was concerned with pipelining for frequency. They wanted minimum gates in the critical paths. Area
> > > > > > is somewhat of a contributor to it but not the main one. ISA decode complexity is. The more encodings you
> > > > > > have, the more information you store per instruction and the more work you have to do in decode.
> > > > >
> > > > > 5000 year ago we used wheels for transportation. And today we still use wheels
> > > > > for transportation. Does not necessarily means every old idea is bad.
> > > > >
> > > > > Once implementation complexity exceeds a certain level and RISC-V implementations start to
> > > > > implement a full spectrum of extensions, caches, branch prediction, etc. the differences between
> > > > > ARMv8 vs RISC-V start to become less relevant from a technology perspective. Performance,
> > > > > energy efficiency, die area, design and validation efforts for processor implementations targeting
> > > > > higher transistor budgets will be closely matched regardless of the ISA.
> > > > >
> > > > > Because of that, claiming that ARM is superior compared to RISC-V or vice versa, is meaningless.
> > > > > Both are excellent ISAs. It will be the other factors that will drive the implementation choice.
> > > > > Such as licensing terms, maturity of the eco-system, familiarity with certain ISAs, etc. etc.
> > > > >
> > > > > Ronald
> > > >
> > > > The modern wheel bears no resemblance to the mesapotamian wheel other than its shape. The solid wood/stone
> > > > wheel was obsolete centuries ago. Meaningless analogies aside, this old idea (RISC) was a good idea
> > > > for a small window of time. To have the option of designing an ISA from scratch and make decisions
> > > > rooted in constraints from that era reflect ignorance, intransigence, or incompetence. There were plenty
> > > > of lessons to be learned if only one looked hard enough. The excuse of it being a pedagogical tool
> > > > will not fly. This isn’t pedagogy, but indoctrination into the fundamentalist RISC cult. I have the
> > > > same complaint of hennessy and patterson textbooks, but that’s an orthogonal issue.
> > >
> > > The insane babbling robot is back.
> >
> > That is a pretty courageous confession. Respect.
>
> Solid stone wheels have never existed, outside of Flintstone
> cartoon physics, the sort of mistake an AI would make.
AND on Yap :-)
> The rest of the post has an IQ that seems too high to be human.
> This combination triggered my post.
>
> Spinning grain grinding stones do not count as they don’t travel and are at a right angle.
> The side does the grinding and roundness is merely a unimportant side effect.
>
>