Intel Xe variable vector width

By: Hugo Décharnes (, December 27, 2019 9:32 am
Room: Moderated Discussions
Hi all,

On its Xe presentation, Intel has disclosed it’ll feature variable “SIMT + SIMD” vector width. I was wondering if anyone had more information about it, both from architectural and micro-architectural POV?
Thanks in advance.


Source: Analyzing Intel’s Discrete Xe-HPC Graphics Disclosure
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TopicPosted ByDate
Intel Xe variable vector widthHugo Décharnes2019/12/27 09:32 AM
  Intel Xe variable vector widthChester2019/12/29 09:11 PM
    CorrectionChester2019/12/29 10:34 PM
      CorrectionSimon Farnsworth2019/12/30 04:59 AM
        ThanksHugo Décharnes2019/12/30 02:48 PM
          ThanksSimon Farnsworth2019/12/31 03:22 AM
            ThanksHugo Décharnes2019/12/31 09:19 AM
              Ignore this answerHugo Décharnes2019/12/31 09:29 AM
            ThanksHugo Décharnes2019/12/31 09:29 AM
            ThanksIntelUser20002019/12/31 04:45 PM
              ThanksAnon2020/01/01 02:37 AM
              ThanksSimon Farnsworth2020/01/01 09:19 AM
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