Anon (no.delete@this.spam.com) on January 13, 2020 4:10 am wrote:
> Ricardo B (ricardo.b.delete@this.xxxxx.xx) on January 12, 2020 5:46 pm wrote:
> > In the x86 there's an intermediate option which runs at minimum overhead.
> > Up to 64 kB code plus up to 64 kB for data plus up to 64 kB for stack runs at no penalty.
> > Plus other intermediate possibilities (eg playing with the ES).
>
> So all that trouble for speeding up 64kb-256kb apps? A rather limited use case, don't you think?
>
> Because of this discussion I was thinking about 8086 limited addressing modes with only 4 combinations of registers,
> maybe the initial idea was to use 4 registers pairs instead, with flat address space, but then some "genius" came
> with the idea of segments, convincing management might have been easier than convincing co-workers.

Given the time frame (circa 1978) and the target market speeding up those small applications would have a make or break it matter.
Even by 1983 the first version of the IBM PC XT shipped with 64 kB upgradable to a maximum of 256 kB.
This should give you an idea of where the bulk of the market was at that time in terms of memory.

And even in relatively modern designs optimized for ultra-low cost as power such as Microchip's PIC16* you can find non-flat memory addressing strategies.
(I don't know about other PIC).