ISA support for constant count loops

By: Travis (travis.downs.delete@this.gmail.com), January 16, 2020 9:48 pm
Room: Moderated Discussions
Linus Torvalds (torvalds.delete@this.linux-foundation.org) on January 16, 2020 7:41 pm wrote:
> Travis Downs (travis.downs.delete@this.gmail.com) on January 16, 2020 4:21 pm wrote:
> >
> > It's when you try to make this counter a dynamic value, e.g., writing by
> > an instruction which takes a GP register that things get a lot messier.
>
> Well, there has to be some dynamic component to it - think taking a fault or exception during
> the loop. The initial hint might be an immediate value, but at some point you have to re-enter
> the loop in the middle, and now the loop counter has to be restored dynamically.
>
> That said, if it acts more like a pure hint to the instruction decoder to unroll the loop into the uop cache
> N times and/or force-initialize a (purely front-end internal) loop counter, maybe it could be a one-time
> thing. IOW, the semantics of it would be purely as a hint to the front end - it wouldn't really change semantics
> of the code stream that follows, and if an exception happens the return point simply wouldn't have that hint
> any more (or if the hint is wrong, it would "only" result in a forced branch mispredict).
>
> So you wouldn't even have an architecturally visible "count" register, you'd literally have
> just an instruction that says "the next loop will execute exactly 20 times", and it would only
> affect the front-end hinting, not any architecturally visible state. Purely a "don't mess with
> the branch prediction when I can tell you ahead of time for this simple thing" thing.
>
> (And because it's purely for the front end, it would have
> to be an immediate as part of the instruction itself).
>
> I don't think there are enough small loops with small fixed
> loop counts for this to really make any difference, though.
>
> Also, judging by how bad software has been at giving hints to hardware, I'm not sure it makes
> sense for that reason either. Intel used to have prefixes on conditional branch instructions
> to let the software say "this is likely taken/not-taken". The key word being "used to". Software
> was so much worse at it than the hardware branch predictors that it only caused more pain.
>
> Linus

I should re-read Paul's post again, but to be clear I was imagining exactly the "hint to the FE only" scenario: you'd have to duplicate the actual loop condition with normal instructions as usual. So it doesn't make such loops smaller in codesize, rather they get bigger.

This does have the advantage that you can use these hints on loops which are not actually fixed iteration but are close enough to it that a fixed prediction works.

I am also somewhat doubtful of the value. Intel actually used to have a loop predictor which would predict such loops exactly, at least after training, but they got rid of it. I don't know if they got rid of it because it was pointless in the face of improving general purpose predictors (it isn't - current predictors don't do well on fixed loops), or there was a technical constraint, but in any case it indicates such loops are at least not super important per Intel's simulations.

The main benefit over a loop predictor would be storing the prediction statically in the instruction stream, using almost no BP resources.

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        Interesting comment about rep instructions & code sizeLinus Torvalds2020/01/16 10:12 AM
          ISA support for constant count loopsPaul A. Clayton2020/01/16 11:28 AM
            ISA support for constant count loopsGabriele Svelto2020/01/16 02:15 PM
              PowerPC "front-end registers"Paul A. Clayton2020/01/16 03:34 PM
              ISA support for constant count loopsTravis Downs2020/01/16 05:21 PM
                ISA support for constant count loopsLinus Torvalds2020/01/16 08:41 PM
                  ISA support for constant count loopsTravis2020/01/16 09:48 PM
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              ISA support for constant count loopsTravis Downs2020/01/17 08:34 AM
            ISA support for constant count loops: ineffective compared to micro-threads2020/01/20 08:02 AM
              ISA support for constant count loops: ineffective compared to micro-threadssomeone2020/01/20 12:23 PM
                ISA support for constant count loops: ineffective compared to micro-threads2020/01/22 09:23 AM
              ISA support for too slow computersEtienne2020/01/21 02:42 AM
                ISA support for constant count loops: ineffective compared to micro-threads2020/01/22 09:18 AM
                  ISA support for constant count loops: ineffective compared to micro-threads2020/01/22 10:04 AM
                  ISA support for constant count loops: ineffective compared to micro-threadsHeikki Kultala2020/01/22 10:47 AM
                    ISA support for constant count loops: ineffective compared to micro-threadsdmcq2020/01/22 01:31 PM
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                      ISA support for constant count loops: ineffective compared to micro-threadsEtienne2020/01/22 04:35 PM
          Interesting comment about rep instructions & code sizeGabriele Svelto2020/01/16 02:00 PM
    Interesting comment about rep instructions & code sizeTravis Downs2020/01/15 03:40 PM
      Interesting comment about rep instructions & code sizeChester2020/01/15 05:16 PM
        Interesting comment about rep instructions & code sizeTravis Downs2020/01/15 05:50 PM
          Interesting comment about rep instructions & code sizeChester2020/01/15 07:24 PM
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                Interesting comment about rep instructions & code sizeTravis Downs2020/01/17 03:41 PM
        Interesting comment about rep instructions & code sizeGabriele Svelto2020/01/16 03:53 AM
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