ISA support for constant count loops: ineffective compared to micro-threads

By: Heikki Kultala (heikki.kultala.delete@this.tuni.fi), January 22, 2020 10:47 am
Room: Moderated Discussions
⚛ (0xe2.0x9a.0x9b.delete@this.gmail.com) on January 22, 2020 8:18 am wrote:

> > Note that with Out Of Order processor you may already treat few iteration in parallel right now...
>
> Only if you can statically (at compile-time) prove that the few iterations are data independent.

No.

OoOE works fully dynamically. The processor fetches multiple iterations of the loop (later iterations of the micro-op cache) and instructions from ANY iteration can execute.

There is no need to prove ANYTHING at compile time; The incoming code looks like completely serial code but the processor extracts huge amount of parallelism from it fully dynamically.

If the processor makes some wrong guess like branch misprediction or incorrectly predicted memory aliasing, then it just reverts the the "last known correct state".

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        Interesting comment about rep instructions & code sizeGabriele Svelto2020/01/16 03:53 AM
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