Has there ever been a CPU with ...

By: Lyra Heartstrings (lyra.delete@this.scc.pon), February 21, 2020 2:45 pm
Room: Moderated Discussions
Adrian (a.delete@this.acm.org) on February 21, 2020 9:10 am wrote:
> Even in modern x86 some form of cache locking might be available, because it is said that some
> (maybe most or all?) BIOSes use the cache as an SRAM before the complete initialization of the
> DRAM controller, but I do not know how exactly that is done, because all references point toward
> "BIOS Developer's Guide" documents that are under NDA.

I believe the trick on x86 is to first fill the cache with the addresses of your choosing, marking that range as Write Back using an MTRR (this forces all writes to go thru cache first), then set the Cache Disable bit in CR0 (this blocks write-back from actually occurring).

Of course, one would want to ensure there is no other memory activity on the system, that the cache lines will not invalidated by anything, and that any hyperthread sharing the same cache is behaving itself nicely.
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
Has there ever been a CPU with ...Moritz2020/02/21 08:11 AM
  Has there ever been a CPU with ...hobold2020/02/21 08:33 AM
    Has there ever been a CPU with ...Adrian2020/02/21 10:10 AM
      Has there ever been a CPU with ...Lyra Heartstrings2020/02/21 02:45 PM
    locked i-cacheMoritz2020/02/21 10:32 AM
      locked i-cacheWilco2020/02/21 11:33 AM
    Has there ever been a CPU with ...blaine2020/02/21 01:39 PM
  Has there ever been a CPU with ...Gabriele Svelto2020/02/21 11:11 AM
    Atari Jaguarincorrector2020/02/22 06:40 AM
    Super-FX & THX, allMoritz2020/02/22 11:40 AM
  Has there ever been a CPU with ...Tim McCaffrey2020/02/21 11:41 AM
    Instruction BuffersRob Thorpe2020/02/22 08:37 PM
      Instruction BuffersMarcus2020/02/23 03:50 AM
        Instruction Buffers - Cray 1Björn R. Björnsson2020/02/23 10:40 AM
          Instruction Buffers - Cray 1Marcus2020/02/23 11:24 AM
            Instruction Buffers - Cray 1Björn R. Björnsson2020/02/23 12:25 PM
  Has there ever been a CPU with ...Mark Roulo2020/02/21 12:57 PM
    before I-cacheMoritz2020/02/21 04:46 PM
      before I-cacheMark Roulo2020/02/21 05:03 PM
        before I-cacherwessel2020/02/22 01:13 PM
          before I-cacheanonymou52020/02/22 03:49 PM
            microcode RAM capacity (before I-cache)hobold2020/02/23 03:33 AM
  Has there ever been a CPU with ...anonymous22020/02/21 01:21 PM
  Has there ever been a CPU with ...Jose2020/02/21 03:43 PM
  Has there ever been a CPU with ...Peter Greenhalgh2020/02/23 04:20 AM
  Has there ever been a CPU with ...gallier22020/02/24 01:28 AM
  Has there ever been a CPU with ...Etienne2020/02/24 06:25 AM
Reply to this Topic
Name:
Email:
Topic:
Body: No Text
How do you spell purple?