Increasing the number of "in flight" instructions on OoO processors

By: Etienne (etienne_lorrain.delete@this.yahoo.fr), April 7, 2020 12:50 am
Room: Moderated Discussions
In these quite times, I wonder one thing: what would be the problem of designing an OoO processor with two (multiple) IP registers (Instruction Pointer), to increase the number of "in flight" assembly instructions.
Just thinking of two set of registers, but really nothing else, no special inter-thread protection (but maybe one or two synchronisation instructions), using the same cache and same FPU/AES... blocks.
It would obviously need special programming, like two "main()" functions or a way to start that other "close thread".
Currently, multiple thread per core seem to take so long to switch form one to another, it would not increase much the number of assembly instructions in-flight.
There is probably major problems, but I do not think of one obvious blocker; anyone can think of such a blocker problem?
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Increasing the number of "in flight" instructions on OoO processorsEtienne2020/04/07 12:50 AM
  Increasing the number of "in flight" instructions on OoO processorsAdrian2020/04/07 01:01 AM
  Increasing the number of "in flight" instructions on OoO processorsGionatan Danti2020/04/07 02:27 AM
    SMT/OS.Jouni2020/04/07 02:47 AM
      SMT/OS.j2020/04/07 05:32 AM
      SMT/OS.Brendan2020/04/07 09:53 AM
        SMT/OS.Jouni2020/04/08 12:04 AM
    Increasing the number of "in flight" instructions on OoO processorsEtienne2020/04/07 09:32 AM
      Increasing the number of "in flight" instructions on OoO processorsnobody in particular2020/04/07 10:45 AM
      Increasing the number of "in flight" instructions on OoO processorsanon2020/04/07 04:47 PM
        Increasing the number of "in flight" instructions on OoO processorsEtienne2020/04/08 01:19 AM
        Technical nitpick about Intel Hyper-ThreadingPaul A. Clayton2020/04/08 04:36 AM
  This is the idea behind speculative multi-threadingDavid Kanter2020/04/07 10:01 AM
  Increasing the number of "in flight" instructions on OoO processors2020/04/08 03:08 PM
  Increasing the number of "in flight" instructions on OoO processorsblaine2020/04/09 12:37 AM
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