Hindered by device testing and design validation

Article: Power Delivery in a Modern Processor
By: Anon3 (non.delete@this.anon3.invalid), May 14, 2020 7:06 am
Room: Moderated Discussions
Mark Roulo (nothanks.delete@this.xxx.com) on May 13, 2020 8:22 am wrote:
> Short version: Validation and debugging are harder and the win is not as obvious as one would like.

Eta Compute recently had a async Cortex M3 based on a technology they call DIAL. However I think their latest designs have given up on this in favour of a more conventional design with much more agressive frequency scaling than normal something they call CVFS.

Another issue with async over and above merits of the technology itself is predicting the overall performance and binning is hard or doesn't really work at all. So if your business model is based on binning then you aren't even going to look at it.
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New article: Power Delivery in a Modern ProcessorDavid Kanter2020/05/11 07:37 AM
  New article: Power Delivery in a Modern ProcessorMaynard Handley2020/05/11 10:03 AM
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      Buried power rails, super vias, etc.Maynard Handley2020/05/11 06:06 PM
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    InductorsDavid Kanter2020/05/11 12:36 PM
  New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/12 07:53 AM
    New article: Power Delivery in a Modern ProcessorJason Creighton2020/05/12 09:15 AM
      New article: Power Delivery in a Modern ProcessorDan Fay2020/05/12 09:35 AM
        New article: Power Delivery in a Modern ProcessorJason Creighton2020/05/13 09:09 AM
          New article: Power Delivery in a Modern ProcessorRicardo B2020/05/13 11:47 PM
            New article: Power Delivery in a Modern ProcessorMichael S2020/05/14 12:29 PM
              New article: Power Delivery in a Modern Processoranon³2020/05/14 05:22 PM
              New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 05:06 AM
                New article: Power Delivery in a Modern ProcessorMichael S2020/05/15 05:13 AM
      New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/13 03:01 PM
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      LDO power savingYoav2020/05/13 03:56 AM
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              LDO power savingRicardo B2020/05/14 12:08 AM
    Asynchronous CPU?dmcq2020/05/12 01:05 PM
      Hindered by device testing and design validationPaul A. Clayton2020/05/12 02:13 PM
        Hindered by device testing and design validationMark Roulo2020/05/13 08:22 AM
          Hindered by device testing and design validationAnon32020/05/14 07:06 AM
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      That is certain one real world example (NT)Paul A. Clayton2020/05/14 09:28 AM
  New article: Power Delivery in a Modern ProcessorDanjel McGougan2020/05/13 06:52 AM
    New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/13 03:07 PM
      New article: Power Delivery in a Modern ProcessorRob Thorpe2020/05/15 06:36 PM
        New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 10:31 PM
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  New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 10:22 PM
    New article: Power Delivery in a Modern ProcessorDavid Kanter2020/05/16 09:03 AM
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