Work scheduling for moderating power

Article: Power Delivery in a Modern Processor
By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), May 14, 2020 9:27 am
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on May 12, 2020 10:40 am wrote:
> Paul A. Clayton (paaronclayton.delete@this.gmail.com) on May 12, 2020 10:15 am wrote:
>> Concerning handling voltage droop, besides lowering frequency, it seems one could also exploit the fact
>> that common case timing typically is less tight than worst case. This would require some kind of validity
>> checking and replay but might provide another knob to handle voltage droop.
>
> There is some work from Michigan and ARM on this, the project was called Razor. The idea used replay.

Razor comes from a different perspective — using the timing slack to increase frequency — but that does indicate that the idea is obvious.

> Changes that reduce the power
> > draw for doing the work at the cost of higher energy or more total work might also be possible. Forms
> > of speculation that trade short term energy use for longer term energy savings (or performance) might
> > be throttled, losing overall efficiency/performance but moderating short term power use.
>
> The problem is that to handle the biggest droop, you need to respond almost instantaneously.

Presumably, such a technique would be one of several. With thousands of cycles between local droop and FIVR adjustments, there would seem to be room for quick but less optimal action (in a cycle or so), somewhat fast (c. 10 cycles) but still not very "intelligent" actions, and even slowish but more considered actions.

Some of the work in detecting power hungry code might be cached in branch prediction structures. (Some power frugal or less timing tight code could probably be detected at instruction decode.) Branch prediction might also be able to predict if an SIMD code sequence is part of a short or long phase. Low confidence branches might also motivate slower, lower power execution of branch shadow operations. (Phase change prediction — which is useful for managing prefetch, branch prediction, and other speculation — might be helpful in managing the power budget.)

I would guess that your economics background, David, would lead you to viewing power supply and demand as an economic problem.

There has been some study of using economic principles for resource management in computing systems. I suspect some "invisible hand" principles might apply (since the system is likely too complex to manage intelligently) and significant effort to make resources more fungible (finer granularity of allocation/trade, diversity of use/substitution, reduction in transaction costs) might be justified. I suspect a completely free market approach would be suboptimal; once anticipation is introduced, one could get a run on a resource that hurts everyone and does not provide an accurate signal of value. In economics, I have "a little learning", enough to make connections but not enough to foresee even half of the dangers.

[snip]
>> It seems that prediction and awareness of the fullness of capacitors could be used to narrow
>> the timing gap of voltage regulation. E.g., predicting that a phase of high memory activity is
>> near could motivate an increase in the power delivery.
>
> Predicting higher power usage and then boosting voltage a little is a valid approach!

Such techniques may already be used. Sadly, publicly documenting microarchitectural details is no longer considered worthwhile.

(Feeding the curiosity of the one-in-ten-thousand(?) is probably not worth the risk of helping competitors and of being sued for alleged patent violations and the cost of composing and editing such documentation. Earlier I was disappointed by the lack of documentation of design decisions (e.g., why a particularly alternative was not chosen), but now I can look back and see how lucky computer architecture enthusiast were.
This should also make me more appreciative of this forum (and Mitch Alsup — and other "good signal providers" — staying on comp.arch).)
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TopicPosted ByDate
New article: Power Delivery in a Modern ProcessorDavid Kanter2020/05/11 07:37 AM
  New article: Power Delivery in a Modern ProcessorMaynard Handley2020/05/11 10:03 AM
    Buried power rails, super vias, etc.David Kanter2020/05/11 11:44 AM
      Buried power rails, super vias, etc.Maynard Handley2020/05/11 06:06 PM
  InductorsMoritz2020/05/11 12:01 PM
    InductorsDavid Kanter2020/05/11 12:36 PM
  New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/12 07:53 AM
    New article: Power Delivery in a Modern ProcessorJason Creighton2020/05/12 09:15 AM
      New article: Power Delivery in a Modern ProcessorDan Fay2020/05/12 09:35 AM
        New article: Power Delivery in a Modern ProcessorJason Creighton2020/05/13 09:09 AM
          New article: Power Delivery in a Modern ProcessorRicardo B2020/05/13 11:47 PM
            New article: Power Delivery in a Modern ProcessorMichael S2020/05/14 12:29 PM
              New article: Power Delivery in a Modern Processoranon³2020/05/14 05:22 PM
              New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 05:06 AM
                New article: Power Delivery in a Modern ProcessorMichael S2020/05/15 05:13 AM
      New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/13 03:01 PM
    LDO power savingDavid Kanter2020/05/12 10:16 AM
      LDO power savingYoav2020/05/13 03:56 AM
        LDO power savingTravis Downs2020/05/13 06:44 AM
          LDO power savingDan Fay2020/05/13 07:03 AM
            LDO power savingTravis Downs2020/05/13 03:02 PM
              LDO power savingRicardo B2020/05/14 12:08 AM
    Asynchronous CPU?dmcq2020/05/12 01:05 PM
      Hindered by device testing and design validationPaul A. Clayton2020/05/12 02:13 PM
        Hindered by device testing and design validationMark Roulo2020/05/13 08:22 AM
          Hindered by device testing and design validationAnon32020/05/14 07:06 AM
  Work scheduling for moderating powerPaul A. Clayton2020/05/12 10:15 AM
    Work scheduling for moderating powerDavid Kanter2020/05/12 10:40 AM
      Work scheduling for moderating powerPaul A. Clayton2020/05/14 09:27 AM
    Work scheduling for moderating powerTravis Downs2020/05/12 01:25 PM
      That is certain one real world example (NT)Paul A. Clayton2020/05/14 09:28 AM
  New article: Power Delivery in a Modern ProcessorDanjel McGougan2020/05/13 06:52 AM
    New article: Power Delivery in a Modern ProcessorTravis Downs2020/05/13 03:07 PM
      New article: Power Delivery in a Modern ProcessorRob Thorpe2020/05/15 06:36 PM
        New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 10:31 PM
  Bypassing capacitors & testingRob Thorpe2020/05/15 06:54 PM
  New article: Power Delivery in a Modern ProcessorRicardo B2020/05/15 10:22 PM
    New article: Power Delivery in a Modern ProcessorDavid Kanter2020/05/16 09:03 AM
  New article: Power Delivery in a Modern ProcessorPaul2020/05/31 11:08 PM
    New article: Power Delivery in a Modern ProcessorDavid Kanter2020/06/01 07:52 AM
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