Article: Power Delivery in a Modern Processor
By: Ricardo B (ricardo.b.delete@this.xxxxx.xx), May 15, 2020 10:22 pm
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on May 11, 2020 7:37 am wrote:
> Friends, posters, and lurkers,
>
> Power delivery is one of the most significant challenges in modern processors. The power
> delivery network (PDN) must meet the demanding requirements of modern CMOS technology,
> supply power with excellent efficiency, and swiftly respond to changes in power draw.
>
> I just published a new post that goes into detail on power
> delivery: https://www.realworldtech.com/power-delivery/
>
> It includes a brief discussion of system level power delivery, Intel's FIVR, and decoupling capacitors.
>
Capacitors can also be MOM capacitors: parasitic capacitance from interlocking finger structures in the routing metal layers.
Some more notes:
* MOSFET capacitors have (much) higher capacitance per unit area than MIM or MOM.
* MOSFET capacitors have leakage.
> Friends, posters, and lurkers,
>
> Power delivery is one of the most significant challenges in modern processors. The power
> delivery network (PDN) must meet the demanding requirements of modern CMOS technology,
> supply power with excellent efficiency, and swiftly respond to changes in power draw.
>
> I just published a new post that goes into detail on power
> delivery: https://www.realworldtech.com/power-delivery/
>
> It includes a brief discussion of system level power delivery, Intel's FIVR, and decoupling capacitors.
>
Capacitors can also be MOM capacitors: parasitic capacitance from interlocking finger structures in the routing metal layers.
Some more notes:
* MOSFET capacitors have (much) higher capacitance per unit area than MIM or MOM.
* MOSFET capacitors have leakage.
