Paul (pave.delete@this.noa-labs.com) on May 31, 2020 11:08 pm wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on May 11, 2020 7:37 am wrote:
> > Friends, posters, and lurkers,
> >
> > Power delivery is one of the most significant challenges in modern processors. The power
> > delivery network (PDN) must meet the demanding requirements of modern CMOS technology,
> > supply power with excellent efficiency, and swiftly respond to changes in power draw.
> >
> > I just published a new post that goes into detail on power
> > delivery: https://www.realworldtech.com/power-delivery/
> >
> > It includes a brief discussion of system level power delivery, Intel's FIVR, and decoupling capacitors.
> >
> > As always, please take a look and comments/feedback/questions welcome here!
> >
> > David
> >
>
> Hello,
>
> I wonder, as the voltages seem to be set to drop by at least 0.1-0.2 volts before copper losses will start
> becoming hard blockers,

Copper losses where?

> is FIVR, or another on package/on chip switching DC-DC a must to continue scaling?

It's not mandatory, but as my article illustrates it's a lot easier if you can use a higher voltage and convert close to the point of load.

> What do you people think of Vicor transformators that Nvidia uses on high end cards?

I didn't talk about specific VR architectures, because there's a huge amount of complexity there and it's a very interesting design space. I kept things simple and focused on the system.

But generally 48V regulation close to point of load seems good for those folks who want 48V.

David