The goal of Cortex-M4 FPU

By: Dan Fay (daniel.fay.delete@this.gmail.com), June 5, 2020 7:31 am
Room: Moderated Discussions

> So, I suppose that their real goal was decent single-precision DSP performance
> comparable with TI mid 2000s TMS320F28 "Delfino" series of DSP-inspired MCUs.

This seems plausible, especially given their "DSP" marketing for their SIMD-within-a-register integer instructions.

Another data point: the FP performance of the M7 appears to be markedly better than the FP performance of the Tensilica LX6 cores in the ESP32:

https://blog.classycode.com/esp32-floating-point-performance-6e9f6f567a69



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  Understanding Cortex M4F instructions timingMichael S2020/06/02 07:23 AM
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