Linus Torvalds (torvalds.delete@this.linux-foundation.org) on July 11, 2020 11:41 am wrote:

OK, I'll bite.

> I hope AVX512 dies a painful death, and that Intel starts fixing real problems instead of
> trying to create magic instructions to then create benchmarks that they can look good on.

I like AVX-512. I think richer and (maybe) wider SIMD instruction sets are (part of) the way forward for single-threaded performance.

>
> I hope Intel gets back to basics: gets their process working again, and concentrate
> more on regular code that isn't HPC or some other pointless special case.

Well on the process side, those aren't even remotely the same people, are they? It's not like they're going to take people working on SIMD ISAs and turn them into chemists and physicists. So I see it like two somewhat independent groups: the process guys produce the raw material that the design guys use.

Still, you can argue the design guys are focusing too much on SIMD stuff. Still, what's left? They can get slightly wider, slightly better this or that, but single-threaded scalar perf has been kind of tapped out for years, no? I can't exactly blame them for just saying "keep the cores as they are, but put twice as many when the process shrinks". They have to justify their existence somehow.

>
> I've said this before, and I'll say it again: in the heyday of x86, when Intel was laughing all the
> way to the bank and killing all their competition, absolutely everybody else did better than Intel
> on FP loads. Intel's FP performance sucked (relatively speaking), and it matter not one iota.

I don't think of AVX-512 as just FP. In some ways it's not even mostly about FP. For many chips with 1 FMA unit, the AVX or AVX-512 throughput is exactly the same: 512 bits per cycle . For me it's about mask registers, powerful shuffles and bit-bashing stuff like multishiftqb and the BITALG and GFNI stuff. This stuff would be cool even at 128 or 256 bits.

I think if you look at most of the instructions Intel has added, most of them are not FP, especially if you exclude special case FP for ML. Once you've added FMA you are pretty much done in FP?

>
> Because absolutely nobody cares outside of benchmarks.

I do!

>
> The same is largely true of AVX512 now - and in the future. Yes, you can find
> things that care. No, those things don't sell machines in the big picture.

It might make only a small difference. I don't see anything that would make a big difference though, outside of much higher core counts. Not sure why they don't do that.

>
> I want my power limits to be reached with regular integer code, not with some AVX512
> power virus that takes away top frequency (because people ended up using it for memcpy!)
> and takes away cores (because those useless garbage units take up space).

Yes, this sucks. It seems better in Ice Lake though. At least on the client part I have the downclocking is very small (only 100 MHz, and nothing at all for 3 or 4 active cores). There is also only 1 downclocking level as opposed to 2 (I guess because there's only 1 FMA?).

Power-limit related downlocking is here to stay though.

>
> Yes, yes, I'm biased. I absolutely destest FP benchmarks, and I realize other people care deeply.
> I just think AVX512 is exactly the wrong thing to do. It's a pet peeve of mine. It's a prime example
> of something Intel has done wrong, partly by just increasing the fragmentation of the market.
>
> Stop with the special-case garbage, and make all the core common stuff that everybody
> cares about run as well as you humanly can. Then do a FPU that is barely good enough
> on the side, and people will be happy. AVX2 is much more than enough.

No! Keep up the good work adding sweet SIMD instruction sets that give you an edge over AMD, who have been kicking your ass in most other ways. Actually put them on all your chips, not just some weird random subset so people actually use them.

Well, maybe not - but I can dream, right?