Linus Torvalds (torvalds.delete@this.linux-foundation.org) on July 11, 2020 7:46 pm wrote:
> Travis Downs (travis.downs.delete@this.gmail.com) on July 11, 2020 7:03 pm wrote:
> >
> > No! Keep up the good work adding sweet SIMD instruction sets that give you an edge
> > over AMD, who have been kicking your ass in most other ways.
>
> The thing is, those sweet SIMD instructions aren't making up
> for the fact that AMD has been kicking ass everywhere else...
>
> That kind of proves my point.
>
> > Actually put them on all your chips, not just some weird random subset so people actually use them.
>
> .. and that's actually a (very big) part of the problem with AVX512.
>
> I'd argue that you simply can't put it in a smaller chip. Not while
> actually making it worth using. It wasn't designed that way.
>
> Some of the AVX512 parts I like: intel did make things more generic with it. I
> think the masking stuff is new to AVX512, no?. But that's less about the width,
> and more about cleaning things up and making them more useful in general.
>
> But I think the 512-bit part is a hot mess, and I think ARM potentially did things
> much better with SVE2. Exactly because hopefully you can have a small and large implementation
> co-existing, instead of the fragmentation that is the AVX world.
>
> Are there any actual SVE2 chips and users out that validate that point? Not
> that I know. I haven't really followed it. But I appreciate people trying
> to do it right. Maybe SVE2 won't work out well, but at least ARM tried.
>
> Not like Intel.
>
> I'll give kudos to Intel when they do things well, and they do do many things well (well, used to, and I'm
> still hoping to see the old Intel come roaring back, because it's been so depressing lately). But I'll also point
> out when I think they've screwed up. AVX512 and transactional memory have been bad, I think. They've been bad
> both from a technical standpoint, but equally importantly from that "fragmenting the market" standpoint.
>
> Linus

Hello,

SVE2 is a superset of both Neon and SVE, and extends SVE for fixed-point DSP workloads among other things.

Note also:
> Each of the vectors can be 128-2048 bits with 128 bits increments. The bottom 128 bits are shared with the fixed 128-bit long V0-V31 vectors of Neon.
That applies to SVE 1st-generation too.

SVE itself ships on Fujitsu A64fx and will be present on Arm Zeus (next-gen Neoverse, going to be available more widely soon).

SVE2 will ship later on. (but cannot comment on that)