What belt is.

By: Brett (ggtgp.delete@this.yahoo.com), July 26, 2020 10:46 pm
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on July 26, 2020 10:00 am wrote:
> Heikki Kultala (heikki.kult.ala.delete@this.gmail.com) on July 26, 2020 7:49 am wrote:
> > Brett (ggtgp.delete@this.yahoo.com) on July 25, 2020 2:16 pm wrote:
> > > dmcq (dmcq.delete@this.fano.co.uk) on July 25, 2020 7:58 am wrote:
> > > > ⚛ (0xe2.0x9a.0x9b.delete@this.gmail.com) on July 24, 2020 4:24 pm wrote:
> > > > > Chester (lamchester.delete@this.gmail.com) on July 24, 2020 3:59 pm wrote:
> > > > > > ⚛ (0xe2.0x9a.0x9b.delete@this.gmail.com) on July 24, 2020 12:56 pm wrote:
> > > > > > > Linus Torvalds (torvalds.delete@this.linux-foundation.org) on July 12, 2020 11:35 am wrote:
> > > > > > > > Because this forum is about architecture design and implementation, isn't it? So I think
> > > > > > > > it's very fair to put down that gauntlet: AVX512 vs SVE2. "Gong plays" - FIGHT!
> > > > > > > >
> > > > > > > > Linus
> > > > > > >
> > > > > > > The number and size of registers in all current CPUs are heavily influenced by the fact
> > > > > > > that those CPU architectures started in years when transistors were a scarce resource.
> > > > > > >
> > > > > > > Today, with the number of transistors in a single chip being counted
> > > > > > > in billions, the following CPU architecture is possible:
> > > > > > >
> > > > > > > - No integer register and no floating-point registers
> > > > > > >
> > > > > > > - 64K (65536 bytes) of local memory per core
> > > > > > >
> > > > > > > - No explicit SIMD instructions: All SIMD instructions are just macro instructions,
> > > > > > > i.e. just special sequences/tuples of normal instructions
> > > > > > >
> > > > > > > So, instead of the following x86 instructions:
> > > > > > >
> > > > > > > MULSD xmm1,xmm2/m64
> > > > > > > MULPD xmm1, xmm2/m128
> > > > > > > VMULPD ymm1, ymm2, ymm3/m256
> > > > > > > VMULPD zmm1, zmm2, zmm3/m512
> > > > > > >
> > > > > > > you can have a CPU with almost-infinite scalability, fully backward compatible and
> > > > > > > fully forward compatible
, based on just recognizing tuples of scalar instructions:
> > > > > > >
> > > > > > > 0064: MULD x1, x2/m64
> > > > > > > 0128: MULD x1, x2/m64; MULD x1+8, x2/m64+8
> > > > > > > 0256: MULD x1, x2/m64; 2*MULD ...; MULD x1+24, x2/m64+24
> > > > > > > 0512: MULD x1, x2/m64; 6*MULD ...; MULD x1+56, x2/m64+56
> > > > > > > 1024: MULD x1, x2/m64; 14*MULD ...; MULD x1+120, x2/m64+120
> > > > > > >
> > > > > > > where 'xN' means an operand N located in local per-core memory starting from the
> > > > > > > byte-offset (in some cases: from the bit-offset) specified in the instruction.
> > > > > >
> > > > > > You want every instruction to reference memory? Even today, we're looking at dual/triple ported L1D caches
> > > > > > with 3-5 cycle load-to-use latencies. Compare that with a 9-ported or whatever register file....
> > > > > >
> > > > > > Yup, decades on and the top part of the memory hierarchy still matters. You want to keep
> > > > > > stuff in regs as much as possible. Also, just look at a die photo and see how much area
> > > > > > registers take compared to the L1D, and how little capacity the register files have.
> > > > >
> > > > > AVX-512 is 32*512 = 16384 bits = 2 KiB. OK, 64K is 32 times more
> > > > > than 2K, but still, how is 64K fundamentally different from 2K?
> > > > >
> > > > > If the 64K memory per core CPU is targeting (is optimized
> > > > > for) workloads with 32-bit or 64-bit pointer size then
> > > > > the design has to divide the 64K into 4- or 8-byte units,
> > > > > so in fact the per-core memory would as such (alone)
> > > > > be theoretically capable of handling 64K/4=16K or 64K/8=8K
> > > > > non-overlapping aligned concurrent accesses per clock.
> > > > > From the 16K or 8K theoretical, only a small number is selected by instructions each clock cycle.
> > > > >
> > > > > Using the 64-byte cacheline of current L1D/L2/L3 caches in the 64K per-core memory would be a huge mistake.
> > > > >
> > > > > If you have problems imagining this running at 5 GHz, then please imagine it running at
> > > > > about 2 GHz. So assume a GPU-like frequency rather than a CPU-like operating frequency.
> > > > >
> > > > > -atom
> > > >
> > > > One would have to avoid store type access or the checking would be horrible. And one would
> > > > be led back to small register files to deal with loops properly. I think I far far prefer
> > > > Ivan Godard's Mill with no registers at all than this huge mess of store/registers.
> > >
> > > The belt is a register file, the register names just happen to loop.
> > > Most of the rest of the architecture is the same as any other CPU, like L1 cache, MMU, etc.
> > > Learn more before posting.
> >
> > No, it's not.
> >
> > The belt consist of registers at the FU outputs. There is no single "belt register file".
> >
> > Learn more before posting.
> >
>
> Since Ivan didn't publish RTL and has no intention to ever publish RTL, there is nothing to learn.
> Brett's interpretation is as good as yours.

Heikki is correct.
There is a single virtual belt that points at the registers in all the functional units.
But that is a confusing thing to tell people, most won’t understand.
A software guy like me does not really need to know these details.

It’s best to look at it from the one ALU Mill case with the H&P book open to the pipelining chapter to understand what is going on. The five instruction loop case fits in the bypass registers. Mill has lots of ALU’s so lots of these registers.

Getting rid of the conventional register file enables Mill to go super wide and cuts the die space needed considerably. Downside is that Mill is in-order which will hurt perhaps not as much as one thinks with good prefetch.
Mill also has cheap function calls and a few other advantages.
Mill is a better design that can do more work with fewer transistors.

RISC is second best, but second best always seems to win.
After the patents expire plus half a decade I expect the industry to start switching to Mill.

Prediction:
Apple will be first due to the big bucks in compiler support needed.
Microsoft will copy Apple, because that’s what Microsoft does. ;)
Google will also copy Apple, same reason. ;)
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TopicPosted ByDate
Alder Lake and AVX-512me2020/07/11 06:02 AM
  Alder Lake and AVX-512Linus Torvalds2020/07/11 10:41 AM
    informative (NT)blue2020/07/11 11:40 AM
    grumpyMichael S2020/07/11 11:51 AM
      grumpyme2020/07/11 12:27 PM
    area and power cost of AVX-512Michael S2020/07/11 11:58 AM
      area and power cost of AVX-512Anon2020/07/11 03:35 PM
        area and power cost of AVX-512Michael S2020/07/12 03:16 AM
          area and power cost of AVX-512Travis Downs2020/07/12 08:13 AM
      area and power cost of AVX-512Travis Downs2020/07/11 06:19 PM
    Alder Lake and AVX-512Maynard Handley2020/07/11 01:02 PM
      Alder Lake and AVX-512Ungo2020/07/11 04:28 PM
        Alder Lake and AVX-512Maynard Handley2020/07/11 09:16 PM
      Alder Lake and AVX-512Linus Torvalds2020/07/11 05:51 PM
        Alder Lake and AVX-5122020/07/12 12:48 PM
          Alder Lake and AVX-512Michael S2020/07/12 02:07 PM
          HDRAnon32020/07/12 02:42 PM
            HDR10 in Kaby Lake?David Kanter2020/07/12 04:09 PM
              HDR10 in Kaby Lake?Maynard Handley2020/07/12 05:13 PM
                Thanks for the link (NT)David Kanter2020/07/12 05:43 PM
              HDR10 in Kaby Lake?Anon32020/07/13 12:36 AM
        Alder Lake and AVX-512Dummond D. Slow2020/07/12 02:00 PM
        AVX-512 with narrow ex units?m2020/07/23 11:10 AM
          AVX-512 with narrow ex units?Anon2020/07/23 11:53 AM
            AVX-512 with narrow ex units?Paul A. Clayton2020/07/23 05:32 PM
              AVX-512 with narrow ex units?Anon2020/07/23 05:50 PM
                AVX-512 with narrow ex units?Paul A. Clayton2020/07/23 06:45 PM
                  AVX-512 with narrow ex units?Anon2020/07/23 07:15 PM
                    AVX-512 with narrow ex units?Jukka Larja2020/07/24 03:44 AM
                      AVX-512 with narrow ex units?Gabriele Svelto2020/07/24 01:56 PM
                        AVX-512 with narrow ex units?Jouni Osmala2020/07/24 08:22 PM
                          AVX-512 with narrow ex units?Jukka Larja2020/07/25 12:32 AM
                      AVX-512 with narrow ex units?Eugene Nalimov2020/07/25 04:56 PM
                        AVX-512 with narrow ex units?Jukka Larja2020/07/26 12:28 AM
                        AVX-512 with narrow ex units?Gabriele Svelto2020/07/26 01:22 PM
                          AVX-512 with narrow ex units?Jukka Larja2020/07/27 06:00 AM
          AVX-512 with narrow ex units?-.-2020/07/23 05:32 PM
            AVX-512 with narrow ex units?Travis Downs2020/07/24 04:01 PM
    Alder Lake and AVX-512Jörn Engel2020/07/11 03:45 PM
      Alder Lake and AVX-512Chester2020/07/11 04:26 PM
        Alder Lake and AVX-512Jörn Engel2020/07/11 05:22 PM
        Alder Lake and AVX-512Michael S2020/07/12 01:02 AM
        Alder Lake and AVX-512Travis Downs2020/07/13 08:01 PM
      Alder Lake and AVX-512Linus Torvalds2020/07/11 05:54 PM
        Alder Lake and AVX-512Jörn Engel2020/07/11 07:01 PM
          Alder Lake and AVX-512N Owen2020/07/11 11:37 PM
            Alder Lake and AVX-512Michael S2020/07/12 12:48 AM
            Alder Lake and AVX-512anon22020/07/12 06:13 PM
          Alder Lake and AVX-512Travis Downs2020/07/13 08:09 PM
            Alder Lake and AVX-512Jörn Engel2020/07/13 10:42 PM
      Alder Lake and AVX-512Doug S2020/07/11 10:49 PM
        Alder Lake and AVX-512Michael S2020/07/12 12:53 AM
    Alder Lake and AVX-512Travis Downs2020/07/11 06:03 PM
      Alder Lake and AVX-512Veedrac2020/07/11 06:43 PM
        Alder Lake and AVX-512anon22020/07/12 12:31 AM
          Alder Lake and AVX-512Veedrac2020/07/12 03:01 AM
            Alder Lake and AVX-512anon22020/07/12 02:26 PM
              Alder Lake and AVX-512Anon32020/07/12 03:07 PM
                Alder Lake and AVX-512anon22020/07/12 04:39 PM
              Alder Lake and AVX-512Veedrac2020/07/12 03:21 PM
                Alder Lake and AVX-512anon22020/07/12 04:33 PM
                  Alder Lake and AVX-512Veedrac2020/07/12 04:54 PM
                    Alder Lake and AVX-512anon22020/07/12 05:20 PM
                  Alder Lake and AVX-512David Hess2020/07/12 06:32 PM
                    Alder Lake and AVX-512anon22020/07/12 07:41 PM
                Alder Lake and AVX-5122020/07/13 03:02 AM
                  Alder Lake and AVX-512anon22020/07/13 06:25 PM
                    PentiumMMX vs Transmeta's VLIW in hindsight2020/07/19 05:16 AM
                      PentiumMMX vs Transmeta's VLIW in hindsightMaynard Handley2020/07/19 09:47 AM
                      PentiumMMX vs Transmeta's VLIW in hindsightanon22020/07/19 02:24 PM
                      VLIW, OOO, Pairing, and FusionChester2020/07/19 09:16 PM
                        Poulson was in-order (NT)anon22020/07/19 11:20 PM
                        VLIW, OOO, Pairing, and FusionMichael S2020/07/19 11:48 PM
                        Itanium is NOT VLIWHeikki Kultala2020/07/20 01:27 PM
                          Itanium is NOT VLIWAdrian2020/07/20 10:03 PM
                            Itanium crappiness and EPIC - and could EPIC still have something good in it?Heikki Kultala2020/07/21 02:38 AM
                              Itanium crappiness and EPIC - and could EPIC still have something good in it?anon22020/07/21 04:03 AM
                                Itanium crappiness and EPIC - and could EPIC still have something good in it?dmcq2020/07/21 02:27 PM
                              Itanium crappiness and EPIC - and could EPIC still have something good in it?j2020/07/21 07:54 AM
                                Itanium crappiness and EPIC - and could EPIC still have something good in it?Tim McCaffrey2020/07/21 09:30 AM
                              Itanium crappiness and EPIC - and could EPIC still have something good in it?Linus Torvalds2020/07/21 08:13 AM
                                Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureHeikki Kultala2020/07/22 11:31 AM
                                  Turn that on its head?Ray2020/07/22 11:49 AM
                                    Turn that on its head?Anon2020/07/22 12:53 PM
                                    Turn that on its head?Maynard Handley2020/07/22 01:37 PM
                                    Turn that on its head?anon22020/07/22 02:32 PM
                                    Turn that on its head?anon32020/07/22 03:45 PM
                                    Turn that on its head?Heikki Kultala2020/07/23 01:53 AM
                                      Turn that on its head?Anon2020/07/23 09:20 AM
                                        Turn that on its head?Heikki Kultala2020/07/23 10:21 AM
                                          Turn that on its head?Brett2020/07/23 02:26 PM
                                            Turn that on its head?Brett2020/07/24 03:22 AM
                                      Bundling OOO entries does this implicitlyDavid Kanter2020/07/23 09:56 AM
                                      Turn that on its head?anon2020/07/23 10:49 AM
                                  Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureMaynard Handley2020/07/22 01:29 PM
                                  Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architecturewumpus2020/07/22 02:16 PM
                                    Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureDoug S2020/07/22 09:37 PM
                                      what Intel would have doneMichael S2020/07/22 11:46 PM
                                        what Intel would have doneDoug S2020/07/23 08:52 AM
                                        what Intel would have doneAnon2020/07/23 09:25 AM
                                          what Intel would have doneMichael S2020/07/23 10:23 AM
                                            what Intel would have doneMontaray Jack2020/07/23 05:08 PM
                                    Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureHeikki Kultala2020/07/22 10:47 PM
                                      Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architecturewumpus2020/07/23 12:46 PM
                                  Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureMichael S2020/07/22 11:56 PM
                                    Itanium is not synomym of EPIC. Itanium is just the most common EPIC-style architectureHeikki Kultala2020/07/23 01:44 AM
                          thanksChester2020/07/24 02:50 PM
      Alder Lake and AVX-512Linus Torvalds2020/07/11 06:46 PM
        Alder Lake and AVX-512never_released2020/07/11 07:54 PM
          Alder Lake and AVX-512Michael S2020/07/12 01:25 AM
        Alder Lake and AVX-512anon22020/07/12 12:36 AM
      Alder Lake and AVX-512Doug S2020/07/11 11:01 PM
      Alder Lake and AVX-512Michael S2020/07/12 01:41 AM
        Alder Lake and AVX-512rwessel2020/07/12 09:17 AM
      Alder Lake and AVX-512-.-2020/08/18 02:24 AM
        Alder Lake and AVX-512Travis Downs2020/08/18 10:04 PM
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      Alder Lake and AVX-512anon2020/07/11 07:12 PM
      Alder Lake and AVX-512Jörn Engel2020/07/11 07:33 PM
        Alder Lake and AVX-512Michael S2020/07/12 02:00 AM
        Alder Lake and AVX-512Jukka Larja2020/07/12 07:51 AM
          Alder Lake and AVX-512Maynard Handley2020/07/12 09:30 AM
            Alder Lake and AVX-512Jukka Larja2020/07/13 06:43 AM
              Alder Lake and AVX-512Montaray Jack2020/07/23 06:20 PM
                Alder Lake and AVX-512Jukka Larja2020/07/24 03:57 AM
          Alder Lake and AVX-512Jörn Engel2020/07/12 10:35 AM
            Alder Lake and AVX-512Linus Torvalds2020/07/12 11:01 AM
              Alder Lake and AVX-512Linus Torvalds2020/07/12 11:15 AM
                Alder Lake and AVX-512anonymou52020/07/12 12:50 PM
                  Alder Lake and AVX-512Linus Torvalds2020/07/12 01:31 PM
                    Alder Lake and AVX-512anonymou52020/07/12 02:09 PM
                      Alder Lake and AVX-512Linus Torvalds2020/07/12 03:25 PM
                        Alder Lake and AVX-512anonymou52020/07/12 07:34 PM
                          Alder Lake and AVX-512Jose2020/07/13 12:35 AM
                  Alder Lake and AVX-512gallier22020/07/13 01:11 AM
                Alder Lake and AVX-512gallier22020/07/13 01:01 AM
                  Alder Lake and AVX-512Linus Torvalds2020/07/13 10:06 AM
                    Alder Lake and AVX-512Doug S2020/07/13 11:11 AM
                      Alder Lake and AVX-512Brett2020/07/14 01:34 AM
                        Alder Lake and AVX-512Linus Torvalds2020/07/14 08:02 AM
                          Alder Lake and AVX-512Maynard Handley2020/07/14 11:40 AM
                            Alder Lake and AVX-512Michael S2020/07/14 11:48 AM
                            Alder Lake and AVX-512Linus Torvalds2020/07/15 12:37 AM
                              OS X file names normalizationMichael S2020/07/15 01:26 AM
                                OS X file names normalizationSimon Farnsworth2020/07/15 03:16 AM
                                  OS X file names normalizationMichael S2020/07/15 09:51 AM
                                    OS X file names normalizationSimon Farnsworth2020/07/15 11:27 AM
                                OS X file names normalizationDoug S2020/07/15 09:46 AM
                                  OS X file names normalizationMichael S2020/07/15 10:05 AM
                                    OS X file names normalizationLinus Torvalds2020/07/15 11:58 AM
                                      OS X file names normalizationLinus Torvalds2020/07/15 01:21 PM
                                      OS X file names normalizationgallier22020/07/15 10:57 PM
                                    OS X file names normalizationgallier22020/07/15 10:44 PM
                                  OS X file names normalizationRob Thorpe2020/07/15 10:23 AM
                                    OS X file names normalizationDoug S2020/07/15 12:32 PM
                                      OS X file names normalizationMaynard Handley2020/07/15 04:20 PM
                                        OS X file names normalizationLinus Torvalds2020/07/15 07:37 PM
                                          OS X file names normalizationAnon32020/07/16 12:43 PM
                                            OS X file names normalizationDoug S2020/07/16 02:38 PM
                                              OS X file names normalizationLinus Torvalds2020/07/16 11:21 PM
                                                OS X file names normalizationAnon32020/07/17 01:15 AM
                                                  OS X file names normalizationJukka Larja2020/07/17 05:40 AM
                                                OS X file names normalizationgallier22020/07/17 02:19 AM
                                                  OS X file names normalizationLinus Torvalds2020/07/17 08:41 AM
                                                    OS X file names normalizationDummond D. Slow2020/07/17 08:54 AM
                                                      OS X file names normalizationLinus Torvalds2020/07/17 09:16 AM
                                                      OS X file names normalizationSimon Farnsworth2020/07/18 05:12 AM
                                              OS X file names normalizationAnon32020/07/17 01:04 AM
                                                OS X file names normalizationDoug S2020/07/17 09:15 AM
                              Alder Lake and AVX-512Maynard Handley2020/07/15 09:32 AM
                            File Systems and VC ProblemsRob Thorpe2020/07/15 06:24 AM
                    vectorization of utf8Robert David Graham2020/07/13 01:36 PM
                      vectorization of utf8anon22020/07/13 04:07 PM
                        vectorization of utf8Robert David Graham2020/07/13 07:36 PM
                          vectorization of utf8anon22020/07/13 10:23 PM
                        vectorization of utf8Maynard Handley2020/07/13 09:46 PM
                      vectorization of utf8Gabriele Svelto2020/07/15 02:27 AM
                    Alder Lake and AVX-512gallier22020/07/14 12:13 AM
              Alder Lake and AVX-512Jörn Engel2020/07/12 12:29 PM
                Alder Lake and AVX-512Linus Torvalds2020/07/12 01:08 PM
                  Alder Lake and AVX-512Jörn Engel2020/07/12 05:26 PM
                    Alder Lake and AVX-512-.-2020/07/12 06:11 PM
                      Alder Lake and AVX-512Jörn Engel2020/07/12 06:43 PM
            Alder Lake and AVX-512Jukka Larja2020/07/13 07:38 AM
              Alder Lake and AVX-512Jörn Engel2020/07/13 09:10 AM
                Alder Lake and AVX-512Michael S2020/07/13 10:02 AM
                  Alder Lake and AVX-512Jörn Engel2020/07/13 10:22 AM
                    Alder Lake and AVX-512Michael S2020/07/13 11:10 AM
                      Alder Lake and AVX-512Jörn Engel2020/07/13 03:03 PM
                Alder Lake and AVX-512Jukka Larja2020/07/14 05:53 AM
      Alder Lake and AVX-512Linus Torvalds2020/07/11 07:34 PM
        Alder Lake and AVX-512Brett2020/07/11 08:02 PM
          Alder Lake and AVX-512David Hess2020/07/13 11:36 AM
            Alder Lake and AVX-512anonymou52020/07/13 12:01 PM
              Alder Lake and AVX-512Brett2020/07/13 03:19 PM
        Alder Lake and AVX-512Geert2020/07/11 08:36 PM
          AMD's FPUChester2020/07/12 01:28 AM
            Is 3|5 lower than 4?Michael S2020/07/12 02:59 AM
              Is 3|5 lower than 4?Chester2020/07/12 04:54 AM
        Alder Lake and AVX-512Geoff Langdale2020/07/11 10:45 PM
          Alder Lake and AVX-512me2020/07/12 02:44 AM
          Alder Lake and AVX-512Michael S2020/07/12 03:09 AM
          Alder Lake and AVX-512Linus Torvalds2020/07/12 10:35 AM
            ~80% of details are wrong. So what one can expect from conclusions? :( (NT)Michael S2020/07/12 10:57 AM
              ~80% of details are wrong. So what one can expect from conclusions? :(anonymous22020/07/12 11:50 AM
            Alder Lake and AVX-512nobody in particular2020/07/12 11:25 AM
              Alder Lake and AVX-512Linus Torvalds2020/07/12 11:37 AM
                Alder Lake and AVX-512nobody in particular2020/07/12 11:43 AM
                  Alder Lake and AVX-512me2020/07/12 12:32 PM
                    Alder Lake and AVX-512Maynard Handley2020/07/12 07:51 PM
            Alder Lake and AVX-512UnmaskedUnderflow2020/07/12 11:33 AM
            AVX-512 vs SVE2-.-2020/07/12 05:22 PM
              AVX-512 vs SVE2noko2020/07/12 11:12 PM
                AVX-512 vs SVE2-.-2020/07/13 03:00 AM
            Alder Lake and AVX-512Geoff Langdale2020/07/12 07:18 PM
              Could you please stop top-posting (NT)Jukka Larja2020/07/13 07:45 AM
              Alder Lake and AVX-512Romain Dolbeau2020/07/15 12:00 AM
            Alder Lake and AVX-512Spiteful Sprites2020/07/13 03:59 AM
              Alder Lake and AVX-512nobody in particular2020/07/13 08:12 AM
                Alder Lake and AVX-512Spiteful Sprites2020/07/13 03:21 PM
                  Alder Lake and AVX-512Jouni Osmala2020/07/14 01:55 AM
                  RISC-V & commercial support (was: Alder Lake and AVX-512)Romain Dolbeau2020/07/15 12:11 AM
                    RISC-V & commercial support (was: Alder Lake and AVX-512)Romain Dolbeau2020/07/15 12:13 AM
              Alder Lake and AVX-512Linus Torvalds2020/07/13 10:10 AM
            AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Romain Dolbeau2020/07/14 09:09 AM
              AVX-512/SVE & HPC (was: Alder Lake and AVX-512)anon2020/07/14 09:53 AM
                AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Romain Dolbeau2020/07/14 10:27 AM
                  AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Maynard Handley2020/07/14 11:52 AM
                  AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Doug S2020/07/14 12:43 PM
                  AVX-512/SVE & HPC (was: Alder Lake and AVX-512)anon2020/07/14 02:01 PM
              AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Linus Torvalds2020/07/14 11:00 AM
                AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Romain Dolbeau2020/07/14 10:42 PM
                  Configurable cache line size?Doug S2020/07/15 09:56 AM
                    Configurable cache line size?dmcq2020/07/15 02:43 PM
                    Configurable cache line size?Romain Dolbeau2020/07/15 10:37 PM
                    Configurable cache line size?NoSpammer2020/07/16 12:27 AM
                    Configurable cache line size?Pixie2020/07/16 09:55 AM
                      Configurable cache line size?Etienne2020/07/17 12:03 AM
                        Configurable cache line size?Hugo Décharnes2020/07/18 01:11 AM
                  Cache line sizeMark Roulo2020/07/15 05:10 PM
                    Cache line sizeanon2020/07/15 05:46 PM
                  AVX-512/SVE & HPC (was: Alder Lake and AVX-512)Gabriele Svelto2020/07/17 01:30 AM
                    AVX-512/SVE & HPC (was: Alder Lake and AVX-512)dmcq2020/07/17 02:34 AM
                      AVX-512/SVE & HPC (was: Alder Lake and AVX-512)zArchJon2020/07/17 12:16 PM
            Macro-instructions to the rescue2020/07/24 11:56 AM
              Some fundamentals haven't changedChester2020/07/24 02:59 PM
                Some fundamentals haven't changed2020/07/24 03:24 PM
                  Some fundamentals haven't changeddmcq2020/07/25 06:58 AM
                    Some fundamentals haven't changed2020/07/25 10:05 AM
                    Some fundamentals haven't changedBrett2020/07/25 01:16 PM
                      Some fundamentals haven't changedBrett2020/07/25 01:27 PM
                      What belt is.Heikki Kultala2020/07/26 06:49 AM
                        What belt is.Michael S2020/07/26 09:00 AM
                          What belt is.Brett2020/07/26 10:46 PM
                            What belt is.Michael S2020/07/26 11:52 PM
                              What belt is.Brett2020/07/27 06:25 AM
                                What belt is.Doug S2020/07/27 12:31 PM
                                  What belt is.Andrew Clough2020/07/28 05:11 AM
                                    What belt is.dmcq2020/07/28 07:17 AM
                                      Mill Compiler still MIA?Geoff Langdale2020/07/28 04:04 PM
                                        If they release the compiler, how they will blame the still-in-development compiler for the lacklust (NT)Anon2020/07/28 04:20 PM
                                          If they release the compiler, how they will blame the still-in-development compiler for the lacklustAnon2020/07/28 04:20 PM
                                        Apparently they're busy writing a kernel...Anon2020/07/29 02:03 AM
                                          Apparently they're busy writing a kernel...dmcq2020/07/29 02:39 AM
                        What belt is.2020/07/26 10:44 AM
                          What belt is.anonymous22020/07/26 11:02 AM
                            What belt is.Doug S2020/07/26 02:26 PM
                              What belt is.2020/07/26 03:02 PM
        gooduseruser2020/07/12 09:06 AM
      Alder Lake and AVX-512-.-2020/07/11 08:03 PM
        Alder Lake and AVX-512-.-2020/07/11 08:07 PM
      Alder Lake and AVX-512j2020/07/12 11:29 PM
        Alder Lake and AVX-512Michael S2020/07/13 12:12 AM
          Alder Lake and AVX-512j2020/07/13 01:58 AM
            Alder Lake and AVX-512dmcq2020/07/13 03:53 PM
              Alder Lake and AVX-512Michael S2020/07/13 11:57 PM
                Alder Lake and AVX-512Maynard Handley2020/07/14 09:26 AM
                Alder Lake and AVX-512dmcq2020/07/14 11:33 AM
                  Alder Lake and AVX-512dmcq2020/07/14 02:43 PM
                    Alder Lake and AVX-512Michael S2020/07/14 11:55 PM
                      Alder Lake and AVX-512dmcq2020/07/15 01:19 AM
                        Alder Lake and AVX-512Michael S2020/07/15 01:34 AM
                          Alder Lake and AVX-512dmcq2020/07/15 02:03 AM
                            Alder Lake and AVX-512Michael S2020/07/15 08:43 AM
                              Alder Lake and AVX-512dmcq2020/07/15 08:54 AM
                                Alder Lake and AVX-512Michael S2020/07/15 10:35 AM
                                  Alder Lake and AVX-512dmcq2020/07/15 02:18 PM
                                    GV100 + POWER9Michael S2020/07/16 12:17 AM
                                      GV100 + POWER9dmcq2020/07/16 07:58 AM
                                        GV100 + POWER9dmcq2020/07/16 08:10 AM
                        Alder Lake and AVX-512dmcq2020/07/15 01:48 AM
    Alder Lake and AVX-512o2020/07/12 02:08 AM
    Alder Lake and AVX-5122020/07/12 10:07 AM
      Alder Lake and AVX-5122020/07/12 10:32 AM
      Alder Lake and AVX-512Linus Torvalds2020/07/12 10:39 AM
        Alder Lake and AVX-5122020/07/12 11:47 AM
        Alder Lake and AVX-512Michael S2020/07/12 12:18 PM
          x87 crapHeikki Kultala2020/07/12 12:30 PM
            x87 crapMichael S2020/07/12 12:37 PM
              x87 crapHeikki kultala2020/07/12 01:11 PM
                x87 crapMichael S2020/07/12 01:50 PM
                  Sparc and PA-RISC vs pentium FP performanceHeikki Kultala2020/07/13 12:14 AM
                    Sparc and PA-RISC vs pentium FP performanceanonymous22020/07/13 09:48 AM
          Alder Lake and AVX-512Doug S2020/07/12 02:33 PM
            Alder Lake and AVX-512Michael S2020/07/12 03:10 PM
    Alder Lake and AVX-512David Kanter2020/07/12 04:01 PM
      Alder Lake and AVX-512anon2020/07/12 04:40 PM
      ~0% of users do much FP outside of GPUs for games (NT)anonymous22020/07/12 04:47 PM
        ~0% of users do much FP outside of GPUs for gamesMaynard Handley2020/07/12 11:26 PM
        not trueChester2020/07/12 11:37 PM
          not trueMichael S2020/07/13 12:29 AM
            not trueChester2020/07/13 12:59 AM
              not trueanonymous22020/07/13 09:32 AM
                not trueMaynard Handley2020/07/13 01:30 PM
                  not trueChester2020/07/14 04:47 AM
            not trueDoug S2020/07/13 11:30 AM
              not trueAnon2020/07/13 12:16 PM
                not trueMaynard Handley2020/07/13 01:39 PM
              not trueMaynard Handley2020/07/13 01:38 PM
          not trueLinus Torvalds2020/07/13 10:27 AM
            not trueDummond D. Slow2020/07/13 01:10 PM
              not trueMaynard Handley2020/07/13 01:49 PM
                not trueDummond D. Slow2020/07/13 02:38 PM
            not true (about FP, not avx-512)Chester2020/07/17 09:37 AM
  Alder Lake and AVX-512Travis Downs2020/07/11 05:45 PM
    Alder Lake and AVX-512-.-2020/07/11 05:57 PM
      Alder Lake and AVX-512-.-2020/07/12 03:26 PM
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