Alternatives Implementations

By: Brett (ggtgp.delete@this.yahoo.com), July 14, 2020 12:38 pm
Room: Moderated Discussions
Doug S (foo.delete@this.bar.bar) on July 14, 2020 10:47 am wrote:
> Maynard Handley (name99.delete@this.name99.org) on July 14, 2020 10:10 am wrote:
> > BTW, as an interesting fact, while trying to (re)find this number I also found
> > https://medium.com/@TrendForce/trendforce-view-foundry-landscape-may-change-for-7nm-and-more-advanced-process-ce73313f32be
> >
> > which prices the A12 at $72. This is interesting both insofar as it's higher than the usual
> > estimate people throw out (~$30..$40) but also insofar as an iPhone SE2 has an A13 and costs
> > $400. Which makes one wonder how reliable these cost estimates are -- $72 seems a substantial
> > fraction of $400, and a lot more also has to go into an SE2.
>
> TechInsights has always had much higher estimates for the cost of Apple's SoCs than others I've
> seen. They listed the A8 at $52, the A9 at $58.50, the A11 at $52 and A13 at $64 (less than the
> A12 despite being larger...maybe they were assuming initial yields on N7 were not so great)

Apple sells 200 million iPhones a year so adding say 2 billion in development costs that adds $10 on the fab costs that the others are using.
Software development is maybe another 2 billion, which Android gets for free from Google.

> Other estimates for the cost of Apple's SoCs are about half as much. Who's closer to the truth,
> I have no idea. I would assume companies that do this sort of thing are plugged into the foundry
> world and have a decent idea what TSMC is going to charge per wafer, and what their yields are.
> How can cost estimates vary by a factor of two? That goes well beyond differing opinions on
> yield and points to a disagreement as to the 'base price' per wafer Apple is paying. Maybe TechInsights
> assumes they pay a lot extra to be 'first in line' for a new process?

Also fixes were mentioned but this is not as bad as you may think. All the empty areas on the bottom layer are filled with spare transistors so the die is not lumpy for the polish step. And the wire levels are not as packed as you might think so you can often just just carve some more wires in the next two mask layers with a laser. ;)
Out of a dozen mask layers you might need to replace one or two.

> Perhaps David has an idea as to why the big difference, or an opinion
> as to whose cost estimates we should lend more credence to.

< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
Skylake-SP area breakdownDavid Kanter2020/07/12 05:13 PM
  Skylake-SP area breakdownanon22020/07/12 06:01 PM
    Skylake-SP area breakdownTravis Downs2020/07/12 07:02 PM
      Skylake-SP area breakdownanon2020/07/12 07:44 PM
  Skylake-SP area breakdownTravis Downs2020/07/12 07:03 PM
    Skylake-SP area breakdownDavid Kanter2020/07/12 07:20 PM
      To elaborateDavid Kanter2020/07/12 07:22 PM
        To elaborateTravis Downs2020/07/13 06:03 AM
          To elaborateAnon2020/07/13 06:36 AM
            To elaborateAdrian2020/07/13 12:45 PM
              To elaborateAnon2020/07/13 01:06 PM
                To elaborateChester2020/07/13 07:30 PM
  Alternatives ImplementationsKyle Siefring2020/07/13 05:02 PM
    Alternatives ImplementationsTravis Downs2020/07/13 07:41 PM
    Alternatives ImplementationsMaynard Handley2020/07/13 09:37 PM
      Alternatives ImplementationsDoug S2020/07/13 10:25 PM
        Mask costsDavid Kanter2020/07/14 07:13 AM
        Alternatives Implementationstarlinian2020/07/14 07:22 AM
          Alternatives ImplementationsDoug S2020/07/14 09:03 AM
          Alternatives ImplementationsMaynard Handley2020/07/14 09:12 AM
        Alternatives ImplementationsMaynard Handley2020/07/14 09:10 AM
          Alternatives ImplementationsDoug S2020/07/14 09:47 AM
            Alternatives ImplementationsBrett2020/07/14 12:38 PM
            Alternatives Implementationstarlinian2020/07/14 01:30 PM
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