Maynard Handley (name99.delete@this.name99.org) on July 29, 2020 9:30 pm wrote:
>
> Let's hope someone figures out how to run standard macOS (and thus some large benchmarks)
> in either mode. Would allow us to quantify in performance terms (putting aside other issues
> like design and validations costs) the win from adopting a weaker memory model...

Not really.

Because the likely thing is that the design simply isn't optimized for x86-TSO, so setting the MSR will just make a lot of memory operations go into a slow mode.

In fact, I'd guess it mostly affects just the decoder, and makes it just turn every LDR into LDAR, and every STR into STLR. That's a fairly trivial thing, and should pretty much get you the x86 semantics.

Then the question becomes how much they bothered to actually optimize their memory units for LDAR/STLR. And the answer may be "not much".

So it doesn't tell us all that much in the big picture, it only says "for this chip and this load it results in X".

Trying to run very low-level benchmarks of particular sequences (ie the kinds of things Travis does in his x86 uarch tests) might show particular areas that Apple ended up working on a lot (or that end up being particularly nasty or simple for memory ordering differences). That might be quite interesting to see.

Linus