Binary translation

By: David Kanter (dkanter.delete@this.realworldtech.com), August 3, 2020 8:19 pm
Room: Moderated Discussions
never_released (never_released.delete@this.gmx.tw) on August 3, 2020 8:44 am wrote:
> Hello,
>
> In the Tegra Xavier SoC, Nvidia provides sequential consistency in hardware
> as part of the Carmel micro-architecture. (with 4 clusters of 2 cores)
>
> It's noted in the TRM as:
> > For coherent memory types, Carmel cores provide a single, sequentially consistent view of coherent memory.
> > Accordingly if no non-coherent access, Cache maintenance or TLB maintenance instruction has been executed
> > since the last memory barrier, memory barriers behave similarly to a single-cycle NOP.
>
> What are the advantages of having that guarantee provided by hardware more than just
> having TSO in practice? Are there cases where it's considered as more useful?

Yes. Binary translation.

> This also interestingly makes it a very unique Armv8.2-A design in the guarantees that it provides...

IIRC, the Carmel core is a dynamic binary translation-based core. So like almost all DBT designs, it has something like a gated store buffer or transactional memory.

David
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TopicPosted ByDate
Sequential consistency in hardwarenever_released2020/08/03 07:44 AM
  Sequential consistency in hardwareLinus Torvalds2020/08/03 09:19 AM
    Sequential consistency in hardwareJon Masters2020/08/03 04:22 PM
      Sequential consistency in hardwareGeert Bosch2020/08/03 07:48 PM
        Sequential consistency in hardwareTravis Downs2020/08/03 08:08 PM
          Sequential consistency in hardwareLinus Torvalds2020/08/03 10:20 PM
            Sequential consistency in hardwareLinus Torvalds2020/08/04 11:56 AM
              Sequential consistency in hardwarenever_released2020/08/04 02:03 PM
            Sequential consistency in hardwareVeedrac2020/08/05 11:54 AM
              Sequential consistency in hardwareDoug S2020/08/05 02:36 PM
                Sequential consistency in hardwareanon22020/08/05 03:06 PM
          Sequential consistency in hardwareAnon2020/08/04 07:02 AM
        Sequential consistency in hardwaredmcq2020/08/04 09:27 AM
          Sequential consistency in hardwareKonrad Schwarz2020/08/05 05:03 AM
  Sequential consistency in hardwareTravis Downs2020/08/03 06:58 PM
    Sequential consistency in hardwaregpd2020/08/04 02:19 AM
    Sequential consistency in hardwareJeff S.2020/08/04 10:11 PM
      Sequential consistency in hardwareTravis Downs2020/08/05 12:04 PM
        Sequential consistency in hardwareJeff S.2020/08/05 02:52 PM
          typoJeff S.2020/08/05 02:55 PM
          Sequential consistency in hardwareTravis Downs2020/08/05 06:39 PM
            Sequential consistency in hardwareJeff S.2020/08/05 07:43 PM
  Binary translationDavid Kanter2020/08/03 08:19 PM
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