NUVIA Phoenix

By: (0xe2.0x9a.0x9b.delete@this.gmail.com), August 12, 2020 1:01 am
Room: Moderated Discussions
Adrian (a.delete@this.acm.org) on August 11, 2020 11:00 am wrote:
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> https://nuviainc.com/blog
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> Various sites, e.g. Anandtech, are commenting on this, but that is the primary link.

It is probable that advances in µOP cache design, in internal µOP encoding and in x86 instruction fusion will enable AMD/Intel to become competitive with most performance-per-watt competitors claiming that their non-x86 CPU is more efficient because of using the ARM ISA or because of using an ISA with a distance from x86 comparable to the distance between the x86 and the ARM instruction sets.

-atom
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