Tiger Lake performance profile

By: Travis Downs (travis.downs.delete@this.gmail.com), September 21, 2020 2:51 pm
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on September 21, 2020 1:38 am wrote:
> Travis Downs (travis.downs.delete@this.gmail.com) on September 20, 2020 5:34 pm wrote:
> > Michael S (already5chosen.delete@this.yahoo.com) on September 20, 2020 10:02 am wrote:
> > > Travis Downs (travis.downs.delete@this.gmail.com) on September 19, 2020 8:26 pm wrote:
> > > > Andrei F (andrei.delete@this.anandtech.com) on September 18, 2020 1:04 am wrote:
> > > > > anon (anon.delete@this.anon.com) on September 17, 2020 7:10 pm wrote:
> > > > > > AnandTech's (SPEC ST performance) review is here: anandtech.com/show/16084/intel-tiger-lake-review-deep-dive-core-11th-gen/8
> > > > > > However not all is good: TigerLake
> > > > > > experiences a noticeable IPC regression compared to IceLake. The memory subsystem is unable
> > > > > > to keep up with the higher clocks, and the reworked cache is not enough.
> > > > > >
> > > > >
> > > > > I just want to add on that sentence as that's not what I wrote
> > > > > in the piece: I don't think the memory subsystem is to blame.
> > > > >
> > > > > It's significantly stronger than ICL and showcases *much* better DRAM latency and significant
> > > > > single core bandwidth uplift. 429.mcf showcases great scaling well beyond clocks, showing
> > > > > that latency for example is not to blame. In my opinion it's a regression *because* of the
> > > > > reworked cache, as essentially the L3 is now 20% slower per clock versus ICL.
> > > >
> > > > You mean L3 latency, right? It might be a part of it, but the regression in libquantum
> > > > and lbm are too large to be explained by this few cycle change, I think. You'd pretty much
> > > > have to write a dedicated L3 latency test to get that big of a drop and IIRC neither of
> > > > those are known to be very dependent on L3 latency (they are more bandwidth heavy).
> > > >
> > > > So I think there's something else more interesting going on there.
> > > >
> > > >
> > >
> > > TGL uncore appears to be inspired SKX, except, hopefully, better latency of LLC misses under light load.
> > > So, may be, it suffers from similarly low single-core bandwidth?
> > >
> >
> > Well Andrei has some detailed bandwidth benchmarks on this page and performance looks
> > better across the board: there's actually a significant bump in L3 and RAM regions.
> >
>
> Yes, it's better than ICL.
> But probably quite a lot worse than desktop SKL.

Yes, that by itself is interesting, but I thought we were discussing why some of the SPECint 2006 tests showed a large regression on TGL wrt ICL, despite being apparently "high bandwidth" tests, yet the synthetic results show that TGL has better bandwidth than ICL.

So these SPECint tests are stressing the memory subsystem in quite a special way to show a regression in the face of improved synthetics. I'm curious what that is.

Maybe they are "parallel but random" accesses: i.e., not pointer chasy (many misses are handled in parallel), but not contiguous either: scattered accesses?
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                  thank you (NT)Michael S2020/09/21 06:42 AM
                  MKPI ? MPKI ? HPKI ?none2020/09/22 12:12 AM
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                SPEC Memory traffic & bandwidthAndrei F2020/09/21 07:36 AM
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                  What is the meaning of multiple rows in few subtests?Andrei F2020/09/21 07:57 AM
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              erratumEric Bron2020/09/21 05:59 AM
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