By: Michael S (already5chosen.delete@this.yahoo.com), October 11, 2020 1:16 am
Room: Moderated Discussions
hobold (hobold.delete@this.vectorizer.org) on October 10, 2020 8:58 am wrote:
> Blue (blue.delete@this.blue.com) on October 8, 2020 9:58 am wrote:
> [...]
> > If AMD can keep up this 15-19% gains every generation, when do
> > the "big on ARM" folks think ARM will effectively catch up?
>
> Most of Zen3's gains seem to come from the reduction of latency (to memory, and between cores). In a sense,
> Zen3 shows how good the Zen2 core already was, if it hadn't been starved for data. The lowered base clocks
> of Zen3 also point to a higher utilization of core execution units (and thus more power draw) at 100% load.
> This seems to be more evidence for there being fewer pipeline bubbles in Zen3 compared to Zen2.
>
> But one cannot reduce latency below zero (no matter what marketing departments
> say), so these gains are not very likely to be repeated by AMD.
>
> On the flip side, SMT gains appear to be lower in Zen3, because a single thread
> alone can now utilize more of the core execution units than it can in Zen2.
>
>
> It's not ARM that needs to catch up; it's Intel.
What is (L3$ miss/L2 TLB hit) latency of Zen3?
I would think that it's still quite high relatively to competitor's client chips or even relatively to AMD's own APUs from several years ago. If true, those are low hanging fruits for a future.
> Blue (blue.delete@this.blue.com) on October 8, 2020 9:58 am wrote:
> [...]
> > If AMD can keep up this 15-19% gains every generation, when do
> > the "big on ARM" folks think ARM will effectively catch up?
>
> Most of Zen3's gains seem to come from the reduction of latency (to memory, and between cores). In a sense,
> Zen3 shows how good the Zen2 core already was, if it hadn't been starved for data. The lowered base clocks
> of Zen3 also point to a higher utilization of core execution units (and thus more power draw) at 100% load.
> This seems to be more evidence for there being fewer pipeline bubbles in Zen3 compared to Zen2.
>
> But one cannot reduce latency below zero (no matter what marketing departments
> say), so these gains are not very likely to be repeated by AMD.
>
> On the flip side, SMT gains appear to be lower in Zen3, because a single thread
> alone can now utilize more of the core execution units than it can in Zen2.
>
>
> It's not ARM that needs to catch up; it's Intel.
What is (L3$ miss/L2 TLB hit) latency of Zen3?
I would think that it's still quite high relatively to competitor's client chips or even relatively to AMD's own APUs from several years ago. If true, those are low hanging fruits for a future.
Topic | Posted By | Date |
---|---|---|
Zen 3 | Blue | 2020/10/08 09:58 AM |
Zen 3 | Rayla | 2020/10/08 10:10 AM |
Zen 3 | Adrian | 2020/10/08 10:13 AM |
Does anyone know whether Zen 3 has AVX-512? (NT) | Foo_ | 2020/10/08 11:54 AM |
Does anyone know whether Zen 3 has AVX-512? | Adrian | 2020/10/08 12:11 PM |
Zen 3 - Number of load/store units | ⚛ | 2020/10/08 10:21 AM |
Zen 3 - Number of load/store units | Rayla | 2020/10/08 10:28 AM |
Zen 3 - Number of load/store units | ⚛ | 2020/10/08 11:22 AM |
Zen 3 - Number of load/store units | Adrian | 2020/10/08 11:53 AM |
Zen 3 - Number of load/store units | Travis Downs | 2020/10/08 09:45 PM |
Zen 3 - CAD benchmark | Per Hesselgren | 2020/10/09 07:29 AM |
Zen 3 - CAD benchmark | Adrian | 2020/10/09 09:27 AM |
Zen 3 - Number of load/store units | itsmydamnation | 2020/10/08 02:38 PM |
Zen 3 - Number of load/store units | Groo | 2020/10/08 02:48 PM |
Zen 3 - Number of load/store units | Wilco | 2020/10/08 03:02 PM |
Zen 3 - Number of load/store units | Dummond D. Slow | 2020/10/08 04:39 PM |
Zen 3 - Number of load/store units | Doug S | 2020/10/09 08:11 AM |
Zen 3 - Number of load/store units | Dummond D. Slow | 2020/10/09 09:43 AM |
Zen 3 - Number of load/store units | Doug S | 2020/10/09 01:43 PM |
N7 and N7P are not load/Store units - please fix the topic in your replies (NT) | Heikki Kultala | 2020/10/10 07:37 AM |
Zen 3 | Jeff S. | 2020/10/08 12:16 PM |
Zen 3 | anon | 2020/10/08 01:57 PM |
Disappointing opening line in paper | Paul A. Clayton | 2020/10/11 06:16 AM |
Thoughts on "Improving the Utilization of µop Caches..." | Paul A. Clayton | 2020/10/14 12:11 PM |
Thoughts on "Improving the Utilization of µop Caches..." | anon | 2020/10/15 11:56 AM |
Thoughts on "Improving the Utilization of µop Caches..." | anon | 2020/10/15 11:57 AM |
Sorry about the mess | anon | 2020/10/15 11:58 AM |
Sorry about the mess | Brett | 2020/10/16 03:22 AM |
Caching dependence info in µop cache | Paul A. Clayton | 2020/10/16 06:20 AM |
Caching dependence info in µop cache | anon | 2020/10/16 12:36 PM |
Caching dependence info in µop cache | Paul A. Clayton | 2020/10/18 01:28 PM |
Zen 3 | juanrga | 2020/10/09 10:12 AM |
Zen 3 | Mr. Camel | 2020/10/09 06:30 PM |
Zen 3 | anon.1 | 2020/10/10 12:44 AM |
Cinebench is terrible benchmark | David Kanter | 2020/10/10 10:36 AM |
Cinebench is terrible benchmark | anon.1 | 2020/10/10 12:06 PM |
Cinebench is terrible benchmark | hobold | 2020/10/10 12:33 PM |
Some comments on benchmarks | Paul A. Clayton | 2020/10/14 12:11 PM |
Some comments on benchmarks | Mark Roulo | 2020/10/14 03:21 PM |
Zen 3 | Adrian | 2020/10/10 01:59 AM |
Zen 3 | Adrian | 2020/10/10 02:18 AM |
Zen 3 | majord | 2020/10/15 04:02 AM |
Zen 3 | hobold | 2020/10/10 08:58 AM |
Zen 3 | Maynard Handley | 2020/10/10 10:36 AM |
Zen 3 | hobold | 2020/10/10 12:19 PM |
Zen 3 | anon | 2020/10/11 02:58 AM |
Zen 3 | hobold | 2020/10/11 12:32 PM |
Zen 3 | anon | 2020/10/11 01:07 PM |
Zen 3 | hobold | 2020/10/11 02:22 PM |
Zen 3 | anon | 2020/10/10 11:51 AM |
Zen 3 | Michael S | 2020/10/11 01:16 AM |
Zen 3 | hobold | 2020/10/11 02:13 AM |
Zen 3 | Michael S | 2020/10/11 02:18 AM |
Zen 3 | anon.1 | 2020/10/11 12:17 PM |
Zen 3 | David Hess | 2020/10/12 06:43 AM |
more power? (NT) | anonymous2 | 2020/10/12 01:26 PM |
I think he's comparing 65W 3700X vs 105W 5800X (NT) | John H | 2020/10/12 04:33 PM |
?! Those are apples and oranges! (NT) | anon | 2020/10/12 04:49 PM |