Michael S (already5chosen.delete@this.yahoo.com) on October 11, 2020 1:16 am wrote:
> hobold (hobold.delete@this.vectorizer.org) on October 10, 2020 8:58 am wrote:
> > Blue (blue.delete@this.blue.com) on October 8, 2020 9:58 am wrote:
> > [...]
> > > If AMD can keep up this 15-19% gains every generation, when do
> > > the "big on ARM" folks think ARM will effectively catch up?
> >
> > Most of Zen3's gains seem to come from the reduction of latency (to memory, and between cores). In a sense,
> > Zen3 shows how good the Zen2 core already was, if it hadn't been starved for data. The lowered base clocks
> > of Zen3 also point to a higher utilization of core execution units (and thus more power draw) at 100% load.
> > This seems to be more evidence for there being fewer pipeline bubbles in Zen3 compared to Zen2.
> >
> > But one cannot reduce latency below zero (no matter what marketing departments
> > say), so these gains are not very likely to be repeated by AMD.
> >
> > On the flip side, SMT gains appear to be lower in Zen3, because a single thread
> > alone can now utilize more of the core execution units than it can in Zen2.
> >
> >
> > It's not ARM that needs to catch up; it's Intel.
>
> What is (L3$ miss/L2 TLB hit) latency of Zen3?
> I would think that it's still quite high relatively to competitor's client chips or even relatively
> to AMD's own APUs from several years ago. If true, those are low hanging fruits for a future.

It is high and they have tried to compensate by throwing cache at the program. Actually reminds me of how intel dealt with not having an on die memory controller in the core2 era. This is fixable but not part of strategy: they want volume for better binning in servers. On die MC is a new tapeout and doesn’t fit with the server chiplet strategy. They could go with fancier packaging but maybe costs/volume production are an issue? I suspect the long game is to move to 2.5D when costs allow.