anon (anon.delete@this.ymous.org) on October 15, 2020 11:56 am wrote:
> Paul A. Clayton (paaronclayton.delete@this.gmail.com) on October 14, 2020 12:11 pm wrote:

snip

> > With µop cache entries being extended basic blocks, I would have guessed that rename optimization
> > would be applied. (One can determine which sources are actually written by previous instructions
> > in the extended basic block and replace them with destination numbers, removing the need to check
> > dependencies. One could also re-order µops, at least within a basic block, to reduce routing
> > energy or provide some other benefit. If a banked register alias table was used, bank conflicts
> > could be cached [such might also introduce another cause of entry termination — if bandwidth
> > is limited at the RAT, higher µop cache fetch bandwidth would be less useful].)
> >
> > I do not mean to be unfairly negative (and I hope my negative
> > comments are not cruel or even just insensitive).
> > I know it is easier to find fault than to provide superior alternatives, easy to ignore limited resources
> > available for research, and easy to see creative ideas as less stunningly creative in hindsight. Since
> > I have not written a single research paper (not even a survey),
> > I am likely less sensitive to the difficulties.
> > My expectations may also be unrealistic; not every expert in the field is more competent than I am in
> > every aspect of the field (even though I am just a hobbyist), not every paper can be so clearly written
> > that readers feel like geniuses because it was so easy to understand, not every paper is so thorough
> > and well organized that readers feel the authors are reading their minds when objections or enhancements
> > are addressed just as they come to the reader's mind.
> >
> > Perhaps something positive will come from this post.
>
> Thank you for this detailed analysis. I haven't read the paper thoroughly yet, but I wanted
> to discuss one of your comments about reordering uops and rename optimizations.
>
> Regarding reordering, the problem here is that is that you cannot generally rename out-of-order because
> although this might not have any impact at first glance (What's the difference between "add rax, rcx;
> ld rbx, [rdx], add r12, rax" and "ld rbx, [rdx], add rax, rcx; add r12, rax"?), I think it it gets messy
> if you want precise exceptions/interruptions. So, you probably can rename out-of-order but you need
> to map those out-of-order mappings back to a ROB-like structure that is allocated earlier than rename
> in the pipeline and it might be weird. However, that is an interesting thought because I know of some
> designs where the RAT is port-limited and so rename groups with at most x reads/writes have to be formed,
> which may not match what is coming out of Decode (compiler could help though).
>
> On the rename optimization thing ("rewriting"). I am not
> sure I followed the idea. Could you please elaborate?
>