By: Mark Roulo (nothanks.delete@this.xxx.com), October 29, 2020 4:02 pm
Room: Moderated Discussions
Megabytephreak (roukemap.delete@this.gmail.com) on October 29, 2020 11:16 am wrote:
> anonymou5 (no.delete@this.spam.com) on October 29, 2020 9:52 am wrote:
> > > The die size for an FPGA that can make good use of the IF bandwidth and do something
> > > worth replacing a CPU chiplet with is going to be a fair bit bigger than the CPU chiplet
> > > I think. The Rome package is already pretty full, so I think you'd probably need to
> > > sacrifice multiple chiplets, probably even half of them to make it work.
> > >
> > > It might be more practical, particularly in the short term to allow pairing a specially packaged
> > > FPGA with a normal CPU in a 2-socket system, using the FPGA transceivers to implement the inter-chip
> > > variant of Infinity Fabric and also supporting the existing DRAM slots. For the very short term
> > > you could also do PCIe between sockets as well, although then you loose cache coherencey.
> >
> > Past attempts by AMD and Intel weren't exactly stunning commercial successes.
> >
> > The term "solution looking for a problem" comes to mind, to be honest.
>
....
> Overall though, as someone who does FPGA design full-time, I'm fairly pessimistic about FPGAs
> in the datacenter. Unless there is a real breakthrough in tools I think the development effort
> will stay prohibitive for many applications. There will always be temporary niches for new concepts,
> such as early SmartNICs as I understand Microsoft did/as doing, but I think in the long run such
> concepts will migrate to Custom ASICs for power, cost and performance gains. My personal experience
> in FPGAs is much more in the embedded space, which has different dynamics.
I don’t understand what Microsoft is doing, but:
“ Microsoft has been deploying FPGAs in every Azure server over the last several years, creating a cloud that can be reconfigured to optimize a diverse set of applications and functions.”
https://azure.microsoft.com/en-us/resources/videos/build-2017-inside-the-microsoft-fpga-based-configurable-cloud/
They have to have something in mind.
> anonymou5 (no.delete@this.spam.com) on October 29, 2020 9:52 am wrote:
> > > The die size for an FPGA that can make good use of the IF bandwidth and do something
> > > worth replacing a CPU chiplet with is going to be a fair bit bigger than the CPU chiplet
> > > I think. The Rome package is already pretty full, so I think you'd probably need to
> > > sacrifice multiple chiplets, probably even half of them to make it work.
> > >
> > > It might be more practical, particularly in the short term to allow pairing a specially packaged
> > > FPGA with a normal CPU in a 2-socket system, using the FPGA transceivers to implement the inter-chip
> > > variant of Infinity Fabric and also supporting the existing DRAM slots. For the very short term
> > > you could also do PCIe between sockets as well, although then you loose cache coherencey.
> >
> > Past attempts by AMD and Intel weren't exactly stunning commercial successes.
> >
> > The term "solution looking for a problem" comes to mind, to be honest.
>
....
> Overall though, as someone who does FPGA design full-time, I'm fairly pessimistic about FPGAs
> in the datacenter. Unless there is a real breakthrough in tools I think the development effort
> will stay prohibitive for many applications. There will always be temporary niches for new concepts,
> such as early SmartNICs as I understand Microsoft did/as doing, but I think in the long run such
> concepts will migrate to Custom ASICs for power, cost and performance gains. My personal experience
> in FPGAs is much more in the embedded space, which has different dynamics.
I don’t understand what Microsoft is doing, but:
“ Microsoft has been deploying FPGAs in every Azure server over the last several years, creating a cloud that can be reconfigured to optimize a diverse set of applications and functions.”
https://azure.microsoft.com/en-us/resources/videos/build-2017-inside-the-microsoft-fpga-based-configurable-cloud/
They have to have something in mind.