By: Michael S (already5chosen.delete@this.yahoo.com), November 3, 2020 2:40 am
Room: Moderated Discussions
Andreas (kingmouf.delete@this.gmail.com) on October 30, 2020 6:29 am wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on October 30, 2020 1:34 am wrote:
> > Howard Chu (hyc.delete@this.symas.com) on October 29, 2020 6:25 pm wrote:
> > > anonymou5 (no.delete@this.spam.com) on October 29, 2020 9:52 am wrote:
> > > > > The die size for an FPGA that can make good use of the IF bandwidth and do something
> > > > > worth replacing a CPU chiplet with is going to be a fair bit bigger than the CPU chiplet
> > > > > I think. The Rome package is already pretty full, so I think you'd probably need to
> > > > > sacrifice multiple chiplets, probably even half of them to make it work.
> > > > >
> > > > > It might be more practical, particularly in the short term to allow pairing a specially packaged
> > > > > FPGA with a normal CPU in a 2-socket system, using the FPGA transceivers to implement the inter-chip
> > > > > variant of Infinity Fabric and also supporting the existing DRAM slots. For the very short term
> > > > > you could also do PCIe between sockets as well, although then you loose cache coherencey.
> > > >
> > > > Past attempts by AMD and Intel weren't exactly stunning commercial successes.
> > > >
> > > > The term "solution looking for a problem" comes to mind, to be honest.
> > >
> > > Intel's Xeon 6138P probably didn't get much traction, but then again,
> > > it also cost 5x as much as the Xeon 6138 without integrated FPGA.
> >
> > Posters above probably had in mind Arria2+Atom hybrid from 2010.
> > https://newsroom.intel.com/press-kits/intel-introduces-configurable-intel-atom-based-processor/#gs.jguw4v
> > According to my understanding, it was a failure.
> >
>
> While this may have been a failure, the Zynq line of FPGAs combining ARM
> cores and FPGA fabric is a total success story with many deployments from
> smartNICs, 5G, infotainment systems, LIDAR, automotive, storage etc etc.
>
Completely different class of product.
- same die, rather that MCM.
- ~10 times cheaper
- focus on classic embedded market rather than on "computing for sake of computing"
Most importantly, Zynq never was "solution looking for a problem". The problems, it was going to solve, were well understood. People combined high-end MCUs (and less frequently low end application processors) with low-mig-range FPGAs on the same board, with MCU as controlling part, for 2 decades before Zynq.
Of course, after Zynq (and almost identical, but less successful Cylone5-HPS) hit the market, engineers managed to find new applications as well, but the base market existed up front.
> Michael S (already5chosen.delete@this.yahoo.com) on October 30, 2020 1:34 am wrote:
> > Howard Chu (hyc.delete@this.symas.com) on October 29, 2020 6:25 pm wrote:
> > > anonymou5 (no.delete@this.spam.com) on October 29, 2020 9:52 am wrote:
> > > > > The die size for an FPGA that can make good use of the IF bandwidth and do something
> > > > > worth replacing a CPU chiplet with is going to be a fair bit bigger than the CPU chiplet
> > > > > I think. The Rome package is already pretty full, so I think you'd probably need to
> > > > > sacrifice multiple chiplets, probably even half of them to make it work.
> > > > >
> > > > > It might be more practical, particularly in the short term to allow pairing a specially packaged
> > > > > FPGA with a normal CPU in a 2-socket system, using the FPGA transceivers to implement the inter-chip
> > > > > variant of Infinity Fabric and also supporting the existing DRAM slots. For the very short term
> > > > > you could also do PCIe between sockets as well, although then you loose cache coherencey.
> > > >
> > > > Past attempts by AMD and Intel weren't exactly stunning commercial successes.
> > > >
> > > > The term "solution looking for a problem" comes to mind, to be honest.
> > >
> > > Intel's Xeon 6138P probably didn't get much traction, but then again,
> > > it also cost 5x as much as the Xeon 6138 without integrated FPGA.
> >
> > Posters above probably had in mind Arria2+Atom hybrid from 2010.
> > https://newsroom.intel.com/press-kits/intel-introduces-configurable-intel-atom-based-processor/#gs.jguw4v
> > According to my understanding, it was a failure.
> >
>
> While this may have been a failure, the Zynq line of FPGAs combining ARM
> cores and FPGA fabric is a total success story with many deployments from
> smartNICs, 5G, infotainment systems, LIDAR, automotive, storage etc etc.
>
Completely different class of product.
- same die, rather that MCM.
- ~10 times cheaper
- focus on classic embedded market rather than on "computing for sake of computing"
Most importantly, Zynq never was "solution looking for a problem". The problems, it was going to solve, were well understood. People combined high-end MCUs (and less frequently low end application processors) with low-mig-range FPGAs on the same board, with MCU as controlling part, for 2 decades before Zynq.
Of course, after Zynq (and almost identical, but less successful Cylone5-HPS) hit the market, engineers managed to find new applications as well, but the base market existed up front.
