By: juanrga (noemail.delete@this.juanrga.com), November 19, 2020 2:49 am
Room: Moderated Discussions
Dummond D. Slow (mental.delete@this.protozoa.us) on November 17, 2020 11:18 am wrote:
> Doug S (foo.delete@this.bar.bar) on November 17, 2020 10:25 am wrote:
> > Dummond D. Slow (mental.delete@this.protozoa.us) on November 16, 2020 6:22 pm wrote:
> > > If the AMD beats M1 at the same or even better power = bad result for Apple.
> >
> >
> > Not really, given that the M1 is their low end solution.
> >
>
> Renoir isn't AMD's highend either. They have been selling 16-64 units of the same uarch for a year.
>
> >
> > Over
> > the next two years we'll see their midrange and high end stuff.
> >
>
> Sure, but see above.
>
> The point was, we have to look at the multithread perf/watt. If Apple loses it's edge it
> has in single-thread in multi-thread, that means something for competitiveness in an higher-corecount
> chip. It would actually pour cold water on the x86 is doomed narratives.
>
>
> Side note: if AMD beats M1 say in 15W envelope or if M1 only wins narrowly, despite having much bigger efficiency
> in single thread (it is close to performance of Zen 3, but at 2-3× less power), what is the reason?
> It's simple: SMT. Had Apple implemented it, it would run away in Cinebench.
> Lesson to the people saying it's a pointless/stupid/doomed feature.
> Seems Renoir is able to bridge its "worse single-thread" and "worse
> manufacturing node" disadvantage pretty much thanks to SMT.
>
Cinebench is a very special case that doesn't represent averages. Not only it has abnormally large SMT yields, but it also bring abnormally high IPC for Zen-like muarchs.
> Doug S (foo.delete@this.bar.bar) on November 17, 2020 10:25 am wrote:
> > Dummond D. Slow (mental.delete@this.protozoa.us) on November 16, 2020 6:22 pm wrote:
> > > If the AMD beats M1 at the same or even better power = bad result for Apple.
> >
> >
> > Not really, given that the M1 is their low end solution.
> >
>
> Renoir isn't AMD's highend either. They have been selling 16-64 units of the same uarch for a year.
>
> >
> > Over
> > the next two years we'll see their midrange and high end stuff.
> >
>
> Sure, but see above.
>
> The point was, we have to look at the multithread perf/watt. If Apple loses it's edge it
> has in single-thread in multi-thread, that means something for competitiveness in an higher-corecount
> chip. It would actually pour cold water on the x86 is doomed narratives.
>
>
> Side note: if AMD beats M1 say in 15W envelope or if M1 only wins narrowly, despite having much bigger efficiency
> in single thread (it is close to performance of Zen 3, but at 2-3× less power), what is the reason?
> It's simple: SMT. Had Apple implemented it, it would run away in Cinebench.
> Lesson to the people saying it's a pointless/stupid/doomed feature.
> Seems Renoir is able to bridge its "worse single-thread" and "worse
> manufacturing node" disadvantage pretty much thanks to SMT.
>
Cinebench is a very special case that doesn't represent averages. Not only it has abnormally large SMT yields, but it also bring abnormally high IPC for Zen-like muarchs.