gallier2 (gallier2.delete@this.gmx.de) on November 18, 2020 11:21 pm wrote:
> Adrian (a.delete@this.acm.org) on November 18, 2020 7:23 am wrote:
> [..]
> >
> > While we do not know with certainty the micro-architectures of the Apple CPUs and how efficiently
> > their various execution units are used in various typical applications, filling the execution units
> > with reordered instructions taken from a single-thread or with instructions taken from independent
> > concurrent threads are the 2 ways of achieving high-utilization for the execution units.
> >
> > A CPU that is very successful at the first method is unlikely
> > to gain much from also applying the second method.
> >
> > So even if we do not really have the information required
> > to know this for sure, I agree with TJ, that it is
> > likely that the Apple CPUs would not gain much from SMT so it might not be worthwhile for them to add it.
> >
> > Anyway, their engineers must have all the data, from execution traces, to estimate
> > any possible benefits, so if there are any, some future CPU model will add it.
> >
> > For now, a Ryzen 7 4700U, without SMT, is mostly below M1, while a Ryzen
> > 7 4800U, with SMT, is mostly above M1, so it is helped by SMT.
> >
>
> I have just a question. Is there even one ARM core that ever implemented SMT? Just curious.
>


Yes:

https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a65