Chester (lamchester.delete@this.gmail.com) on November 26, 2020 6:38 pm wrote:
> dmcq (dmcq.delete@this.fano.co.uk) on November 26, 2020 2:31 pm wrote:
> > Chester (lamchester.delete@this.gmail.com) on November 26, 2020 10:29 am wrote:
> > > David Kanter (dkanter.delete@this.realworldtech.com) on November 22, 2020 11:01 pm wrote:
> > > > > > I think you need to look at what folks were saying at that time.
> > > > > >
> > > > > > For example, many people claim ARM has intrinsic advantages over x86. I was staking
> > > > > > out positions many didn't and don't agree with. Specifically, that ARM has no real
> > > > > > advantages over x86 for high performance cores (but does for small ones).
> > > > >
> > > > > Actually David if you look at the high performance Apple A13 vs Zen 2 (3950X) they have similar scores
> > > > > on GB5 and are on similar processes yet the A13 is much more power efficient, retaining the ARM advantage.
> > > > > Even with Zen 3 getting 23% higher scores on GB5 it is still in the same power efficiency ballpark as Zen
> > > > > 2. x86 just cannot approach the power efficiency of ARM at any processor core performance level.
> > > >
> > > > As others pointed out, comparing a desktop-focused chiplet to a
> > > > smartphone SoC makes for unrealistic power comparisons at best.
> > > >
> > > > Also, Geekbench isn't a good benchmark.
> > > >
> > > > Last, you should tell that to all the architects who have designed x86 and ARM processors.
> > > > They will tell you - for a high-performance core, there is very little difference. That includes
> > > > folks working (or previously working) at Apple, ARM, and many other companies.
> > > >
> > > > David
> > >
> > > https://tspace.library.utoronto.ca/bitstream/1807/80713/1/Wong_Henry_T_201711_PhD_thesis.pdf
> > > is a good read.
> > >

Surprisingly, modern ARM instruction sets are not much simpler than x86, despite being called “RISC”.
> > > The ARM instruction set also needs decoding into micro-ops.
> > > The ARM memory system is similar to x86, supporting
> > > unaligned data accesses and hardware TLB miss handling. Unlike
> > > x86, ARMv7 also allows predication of most instructions
> > > and an implicit barrel shift of one operand for most arithmetic
> > > instructions, which are features that are difficult
> > > to implement in out-of-order processors. On the other hand,
> > > one particularly complex-to-implement feature of
> > > x86 is variable instruction length where the length is non-trivial
> > > to compute (1 to 15 bytes), while ARM Thumb’s
> > > variable-length instructions only have two possible lengths (2 or 4 bytes).
> > > ...
> > > While x86 is more complex, the extra complexity due specifically to x86 is modest
> > > — much of the complexity of supporting an operating system (supporting exceptions,
> > > paging, privilege levels, etc.) is common to most instruction sets

> > >
> > > So yeah, X86 is more complex. But once you're designing a complex, OOO core that supports
> > > everything a modern OS demands, X86's extra complexity is a drop in the bucket.
> >
> > He was looking at ARMv7. The ARM 32 bit instruction set is nearly as old as x86, it
> > is not a 'modern RISC'! The design was for when the CPU and memory cycle speeds were
> > of the same order, it was a much better design than MIPS or x86 for that environment.
> > It is still a good design for embedded processors running at a lower frequency.
>
> Perhaps for embedded processors running at low frequency, but as David
> said, there's very little difference for high performance designs.

Others disagree, including Jim Keller or Gopal Hegde.

> Has anything changed with aarch64 that invalidates Henry's statement? aarch64
> retains user-space compatibility with ARMv7, and still supports features required
> by modern operating systems (paging, exceptions, privilege levels).

The ARMv8 architecture is classically British; a clean and elegant 64-bit instruction set, with backwards compatibility for existing 32-bit software. The new AArch64 is certainly an improvement over ARMv7, with many improvements above and beyond simply extending the virtual address space to 48-bits.

The most notable additions in ARMv8 are the larger and highly regular integer register file, double precision vectors with IEEE support, and new synchronization primitives with a well-defined memory ordering model. In some respects though, the more significant changes came not from adding features, but removing them.

Like x86, ARMv7 had a fair bit of cruft, and the architects took care to remove many of the byzantine aspects of the instruction set that were difficult to implement. The peculiar interrupt modes and banked registers are mostly gone. Predication and implicit shift operations have been dramatically curtailed. The load/store multiple instructions have also been eliminated, replaced with load/store pair. Collectively, these changes make AArch64 potentially more efficient than ARMv7 and easier to implement in modern process technology.

https://www.realworldtech.com/arm64/5/