Brett (ggtgp.delete@this.yahoo.com) on November 20, 2020 8:56 pm wrote:

> But to go wider x86 decoding becomes expensive in area and
> heat. x86 is stuck between a rock and a hard place, something has to give.

Two obvious routes are keeping the decoder much as it is and making the L0 cache and the rest of the core wider, and adding decode hints to the L1 instruction cache.

You could do either of those without breaking compatibility -- so history implies both Intel and AMD would want to do so if it was practical.