Brett (ggtgp.delete@this.yahoo.com) on December 19, 2020 8:13 pm wrote:
> What exactly is wrong with moving ECC on chip as is being done?
> On chip the ECC is faster and does not involve the CPU, so one bit flips by cosmic ray strikes are fixed.
> Most systems only have one or two RAM chips, now those systems can have ECC.
> Denser chips are more error prone, so eventually all RAM chips will have ECC.
> The cost to add one bit to a 128 bit access is cheap at under 1%, so high
> quality multi bit ECC is cheap and what is cheap becomes widespread.
>
> Manufacturing wise you test the chips and those with hard errors fixed by ECC you sell as
> non-ECC chips at full price, instead of at half price as you disabled half the array.
> Right now hard errors are handled by spares, but you don’t need spares with on chip ECC. So
> a chip with ECC is not bigger and more expensive, the spares are just getting used actively.
> This is why ECC is moving on chip, it’s the best place to do ECC.
>
> Thus I predict that the era of RAM bit flip errors will shortly be largely over.

I have heard that the capacitors that make up DRAM have not been shrinking in volume, tricks like trenches being used to continue shrinks.

So when does DRAM convert over to multi-level charges like flash storage?

This would means a greater internal refresh rate and subsequent power draw, but that is irrelevant to most customers. Reads could also be slower by a cycle, etc.