By: anon3 (delete.not.delete@this.real.this.xyz), December 26, 2020 11:22 pm
Room: Moderated Discussions
Björn Ragnar Björnsson (bjorn.ragnar.delete@this.gmail.com) on December 25, 2020 6:44 pm wrote:
> Paul (pavel.delete@this.noa-labs.com) on December 23, 2020 1:00 pm wrote:
> > It's not a big secret too that ECC memory DIMMs from big memory
> > brands often come with more derated dies than non-ECC DIMMs.
>
> Tell me more. You're suggesting that DRAM companies are selling inferior chips to the buyers
> that are most conscientious about reliability and error resiliency? Inferior chips at a
> premium price compared to better binned chips? Not saying your wrong, your conjecture would
> certainly explain why we can't get ECC DIMMs at optimal frequency & latency.
>
> Forgive me, but I cringe at the thought. Double cringe if it's true.
The claim is the exact opposite of what you are thinking. To "derate" is to leave margin. So they are taking their very best parts and labeling them with low speeds for their ECC DIMMs. (You might then think that these DIMMs can often overclock very well. You would be right.)
In fact, it is a little more subtle than that. The best performing ICs at stock voltage go into ECC DIMMs. The ones that do best with a little extra voltage, or generally the ones that are fastest overall (not necessarily most stable...) go to the high-frequency gaming DIMMs. The ones that undervolt the best go into the ULP DIMMs. Etc. And for all the rest, well, what else is the consumer market good for?
None of this is published. But it matches the performance of the products in the market. And, indeed, some of the best evidence that the above is a decent model for reality is just how hard you can push a top-bin DDR4-2666 ECC UDIMM, without even a single extra millivolt.
> Paul (pavel.delete@this.noa-labs.com) on December 23, 2020 1:00 pm wrote:
> > It's not a big secret too that ECC memory DIMMs from big memory
> > brands often come with more derated dies than non-ECC DIMMs.
>
> Tell me more. You're suggesting that DRAM companies are selling inferior chips to the buyers
> that are most conscientious about reliability and error resiliency? Inferior chips at a
> premium price compared to better binned chips? Not saying your wrong, your conjecture would
> certainly explain why we can't get ECC DIMMs at optimal frequency & latency.
>
> Forgive me, but I cringe at the thought. Double cringe if it's true.
The claim is the exact opposite of what you are thinking. To "derate" is to leave margin. So they are taking their very best parts and labeling them with low speeds for their ECC DIMMs. (You might then think that these DIMMs can often overclock very well. You would be right.)
In fact, it is a little more subtle than that. The best performing ICs at stock voltage go into ECC DIMMs. The ones that do best with a little extra voltage, or generally the ones that are fastest overall (not necessarily most stable...) go to the high-frequency gaming DIMMs. The ones that undervolt the best go into the ULP DIMMs. Etc. And for all the rest, well, what else is the consumer market good for?
None of this is published. But it matches the performance of the products in the market. And, indeed, some of the best evidence that the above is a decent model for reality is just how hard you can push a top-bin DDR4-2666 ECC UDIMM, without even a single extra millivolt.