anon (anon.delete@this.anon.anon) on January 7, 2021 2:21 am wrote:
> Etienne Lorrain (etienne_lorrain.delete@this.yahoo.fr) on January 7, 2021 1:21 am wrote:
> > Jukka Larja (roskakori2006.delete@this.gmail.com) on January 1, 2021 10:28 pm wrote:
> > > as there isn't clear information about what that "unofficial" means.
> >
> > Maybe, just maybe, it is because of the length of an ECC line.
> > If I remember well, you can prove/check that up to 32 bits protected by 6 bits, your logical
> > SECDED circuitry will always correct one bit error, and always report DED if more than
> > one error is present (no triple or more fault error will be detected as a SEC).
> > You can't do that if your ECC line is longer, more (or equal) to 64 bits protected by more (or equal) than
> > 7 bits, you just have a "strong feeling" it is, but checking every combinations would be too long.
> > Same with DECTED, too many combinations.
>
> Isn't ECC overhead 1/8th the cost of the data? Like if you
> have 8 DRAM chips, the ECC chip would be the ninth one?

No, it is 1/8th when the word length is 64 bits, and relatively larger for smaller words.

Common DIMMs use 8 by-8 DRAM chips for a 64 bit memory channel, so only 1 additional by-8 chip is required. 30 pin SIMMs use 8 by-1 DRAM chips for an 8 bit memory channel, but can only support parity with 9 by-1 DRAM chips.