Tremont has 3x2 OOO instruction decoders

By: Linus Torvalds (torvalds.delete@this.linux-foundation.org), January 12, 2021 12:56 pm
Room: Moderated Discussions
Linus Torvalds (torvalds.delete@this.linux-foundation.org) on January 12, 2021 11:39 am wrote:
>
> It really isn't just "netburst wasn't a good implementation of
> trace caches". It really is "trace caches aren't a good idea".

Side note: I'm obviously not a fan of trace caches, and I think the netburst family was a big failure and Intel took a few too many years to realize that failure, but at the same time I have to also give kudos to the P4 trace cache designers.

I seriously think that the P4 trace cache was the most studly and interesting microarchitecture of the last several decades. I think the designers were superstars even if it ended up not actually working that well.

To compare it to other intel microarchitectures, I think netburst was about a million times more interesting than ia64 was: netburst tried something clever, netburst tried something new, and the netburst people were highly competent. Yes, it failed, but it didn't fail due to incompetence and stupidity. It failed because they tried something that hadn't really been done commercially before.

ia64, in contrast, wasn't interesting at all. It was just bad ideas piled on other bad ideas, executed badly for various reasons, and there was no real interesting micro-architectural revolution anywhere in sight.

So it turns out that a good old boring OoO engine that is just done as well as possible (ie just make the best caches you can, have big OoO windows, yadda yadda) seems to be the best actual implementation right now.

uop caches aren't perhaps "exciting" - it's "just another level of caching", after all. They are the usual "plodding" kind of solid, good, incremental engineering.

Trace caches were something else. Maybe not a good something else in the end, but credit where credit is due.

So I may not be a P4 fan, but I am impressed by the design. It's easy (in hindsight) to say that it didn't work, but that didn't make it stupid at the time.

Linus
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
M1 performanceDavid Kanter2021/01/04 09:36 AM
  M1 performanceanon2021/01/04 12:39 PM
    M1 performanceMaynard Handley2021/01/04 01:18 PM
      ILP beyond conventionMoritz2021/01/08 03:59 AM
        ILP beyond conventionMoritz2021/01/09 09:08 AM
    Branch prediction accuracyRayla2021/01/04 01:23 PM
      Branch prediction accuracyAndrei F2021/01/04 02:51 PM
    M1 performanceanon.12021/01/04 01:45 PM
      M1 performanceAndrei F2021/01/04 02:38 PM
        M1 performanceDavid Kanter2021/01/04 02:42 PM
          M1 performanceAndrei F2021/01/04 02:44 PM
            M1 performanceanon22021/01/04 04:57 PM
          M1 performanceFoo_2021/01/04 02:52 PM
            M1 performanceMaynard Handley2021/01/04 03:37 PM
              M1 performancedmcq2021/01/04 05:05 PM
        M1 performanceMaynard Handley2021/01/04 03:37 PM
          M1 performanceanon.12021/01/05 04:05 PM
            M1 performanceMaynard Handley2021/01/05 05:40 PM
              M1 performanceDavid Hess2021/01/10 06:11 PM
                M1 performanceMaynard Handley2021/01/10 07:49 PM
                  M1 performanceDavid Hess2021/01/10 09:02 PM
          M1 performance [How are your KIPpers sir?]Björn Ragnar Björnsson2021/01/05 07:12 PM
        M1 performanceVeedrac2021/01/04 09:32 PM
          M1 performanceWilco2021/01/05 04:57 AM
            M1 performancedmcq2021/01/05 06:31 AM
              M1 performanceanon2021/01/05 04:18 PM
                M1 performancedmcq2021/01/05 04:50 PM
                  M1 performanceMaynard Handley2021/01/05 05:49 PM
                M1 performanceMaynard Handley2021/01/05 05:44 PM
            M1 performance (are data prefetchers useful?)Veedrac2021/01/05 06:55 AM
              M1 performance (are data prefetchers useful?)anon2021/01/05 07:21 AM
                M1 performance (are data prefetchers useful?)Veedrac2021/01/05 07:58 AM
                  M1 performance (are data prefetchers useful?)dmcq2021/01/05 09:33 AM
                    M1 performance (are data prefetchers useful?)Veedrac2021/01/05 10:56 AM
                      M1 performance (are data prefetchers useful?)none2021/01/05 11:13 AM
                        M1 performance (are data prefetchers useful?)Jörn Engel2021/01/05 11:59 AM
                        M1 performance (are data prefetchers useful?)Chester2021/01/05 12:46 PM
                        M1 performance (are data prefetchers useful?)Etienne Lorrain2021/01/06 02:43 AM
                          M1 performance (are data prefetchers useful?)none2021/01/06 03:28 AM
                            M1 performance (are data prefetchers useful?)Adrian2021/01/06 05:49 AM
              M1 performance (are data prefetchers useful?)Adrian2021/01/05 07:29 AM
              M1 performance (are data prefetchers useful?)Andrei F2021/01/05 07:43 AM
              M1 performance (are data prefetchers useful?)Maynard Handley2021/01/05 09:48 AM
                M1 performance (are data prefetchers useful?)Veedrac2021/01/05 11:51 AM
                  M1 performance (are data prefetchers useful?)Maynard Handley2021/01/05 12:02 PM
                    M1 performance (are data prefetchers useful?)Veedrac2021/01/05 01:30 PM
                      M1 performance (are data prefetchers useful?)Maynard Handley2021/01/05 03:34 PM
                        M1 performance (thanks)Veedrac2021/01/05 04:53 PM
                  M1 performance (are data prefetchers useful?)Mark Roulo2021/01/05 02:10 PM
                    M1 performance (are data prefetchers useful?)Anon2021/01/05 02:15 PM
                    M1 performance (are data prefetchers useful?)none2021/01/06 03:37 AM
                    libraries, etc.?David Kanter2021/01/06 02:33 PM
              M1 performance (are data prefetchers useful?)Doug S2021/01/05 12:41 PM
  M1 performanceAndrei F2021/01/04 02:33 PM
    M1 performanceDavid Kanter2021/01/04 02:40 PM
      M1 performanceAndrei F2021/01/04 02:49 PM
  M1 performance & ISAMoritz2021/01/08 04:28 AM
    M1 performance & ISAnone2021/01/08 05:15 AM
    M1 performance & ISAj2021/01/08 07:48 AM
      ease of decoding irrelevant to performance?Moritz2021/01/08 09:43 AM
        ease of decoding irrelevant to performance?j2021/01/08 10:17 AM
        ease of decoding irrelevant to performance?Anon2021/01/08 10:56 AM
          ease of decoding irrelevant to performance?dmcq2021/01/08 12:17 PM
    M1 performance & ISAJames2021/01/08 07:56 AM
    M1 performance & ISADoug S2021/01/08 08:42 AM
    M1 performance & ISADavid Kanter2021/01/08 09:24 AM
      M1 performance & ISAMoritz2021/01/08 12:45 PM
      M1 performance & ISAFoo_2021/01/08 01:22 PM
        M1 performance & ISAChester2021/01/08 07:24 PM
          M1 performance & ISAMaynard Handley2021/01/08 10:16 PM
            M1 performance & ISAAnon2021/01/08 11:59 PM
          M1 performance & ISANobody2021/01/09 01:53 AM
            Battle Royale: Do Skylake & Ice Lake decode 5 x86 instructions/cycle?anon2021/01/09 02:53 PM
              Intel thinks Skylake has five instruction decodersMark Roulo2021/01/09 03:21 PM
                No, Intel does not think so. It's 5 MICRO-ops form 5 x86 instructions (NT)Heikki Kultala2021/01/09 03:26 PM
                  5 MICRO-ops form FOUR x86 instructions I mean (NT)Heikki Kultala2021/01/09 03:26 PM
                And Intel thinks Tremont has3x2 instruction decodersMark Roulo2021/01/09 03:28 PM
                  And Intel thinks Tremont has 3x2 instruction decodersCarson2021/01/09 06:57 PM
                    And Intel thinks Tremont has 3x2 instruction decodersDavid Kanter2021/01/09 08:50 PM
                      OoO fetch and decode: The tale of the spiderAnon2021/01/09 10:00 PM
                        OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 11:18 AM
                          OoO fetch and decode: The tale of the spiderAnon2021/01/10 01:11 PM
                            OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 03:18 PM
                              OoO fetch and decode: The tale of the spiderAnon2021/01/10 03:46 PM
                                OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 04:21 PM
                                  OoO fetch and decode: The tale of the spiderMichael S2021/01/10 04:38 PM
                                    OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 04:52 PM
                                      OoO fetch and decode: The tale of the spiderGabriele Svelto2021/01/11 02:33 AM
                                        OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 10:21 AM
                                          OoO fetch and decode: The tale of the spiderAnon2021/01/11 03:04 PM
                                            OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 03:45 PM
                                              OoO fetch and decode: The tale of the spiderAnon2021/01/11 07:14 PM
                                          OoO fetch and decode: The tale of the spiderGabriele Svelto2021/01/11 03:43 PM
                                            OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 04:26 PM
                                              OoO fetch and decode: The tale of the spideranon2021/01/11 06:43 PM
                                                OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 07:35 PM
                                  OoO fetch and decode: The tale of the spiderAnon2021/01/10 06:26 PM
                                    OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 07:48 PM
                                      OoO fetch and decode: The tale of the spiderAnon2021/01/10 08:08 PM
                              OoO fetch and decode: The tale of the spiderDavid Kanter2021/01/10 10:02 PM
                                OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/10 10:20 PM
                                  OoO fetch and decode: The tale of the spiderChester2021/01/11 03:01 PM
                                    OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 03:50 PM
                                      OoO fetch and decode: The tale of the spiderChester2021/01/11 06:21 PM
                                        OoO fetch and decode: The tale of the spideranon2021/01/11 07:06 PM
                                          OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 07:51 PM
                                            OoO fetch and decode: The tale of the spiderAnon2021/01/11 08:02 PM
                                              OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 08:13 PM
                                                OoO fetch and decode: The tale of the spiderAnon2021/01/11 08:18 PM
                                                OoO fetch and decode: The tale of the spideranon22021/01/11 10:18 PM
                                                  Perhaps they should have added "wide instruction busses" instead, Maynard?anon22021/01/12 07:12 PM
                                                    Perhaps they should have added "wide instruction busses" instead, Maynard?Maynard Handley2021/01/12 07:16 PM
                                                      Perhaps they should have added "wide instruction busses" instead, Maynard?anon22021/01/12 07:24 PM
                                        OoO fetch and decode: The tale of the spiderMaynard Handley2021/01/11 07:36 PM
                          OoO fetch and decode: The tale of the spideranon22021/01/10 03:43 PM
                      And Intel thinks Tremont has 3x2 instruction decodersCarson2021/01/10 07:19 AM
                        Tremont has 3x2 OOO instruction decodersDavid Kanter2021/01/10 10:26 AM
                          Tremont has 3x2 OOO instruction decodersFoo_2021/01/10 01:41 PM
                            Tremont has 3x2 OOO instruction decodersDavid Kanter2021/01/10 09:51 PM
                            FutureCore with 4x2 or 4x3 OoO instruction decodersOok2021/01/12 03:00 PM
                              FutureCore with 4x2 or 4x3 OoO instruction decodersOok2021/01/12 03:03 PM
                              FutureCore with 4x2 or 4x3 OoO instruction decodersanon22021/01/12 11:57 PM
                                FutureCore with 4x2 or 4x3 OoO instruction decodersGionatan Danti2021/01/13 12:39 AM
                                  FutureCore with 4x2 or 4x3 OoO instruction decodersDavid Kanter2021/01/13 08:34 AM
                                    FutureCore with 4x2 or 4x3 OoO instruction decodersOok2021/01/13 10:45 AM
                                FutureCore with Thumb-X64Ook2021/01/13 11:01 AM
                                  FutureCore with Thumb-X64Doug S2021/01/14 10:16 AM
                                    FutureCore with Thumb-X64Ook2021/01/14 10:37 AM
                                    FutureCore with Thumb-X64Ricardo B2021/01/14 11:12 AM
                                      FutureCore with Thumb-X64Doug S2021/01/14 03:01 PM
                                        FutureCore with Thumb-X64Ook2021/01/14 03:16 PM
                                        FutureCore with Thumb-X64Ricardo B2021/01/14 05:53 PM
                              FutureCore with 4x2 or 4x3 OoO instruction decodersWilco2021/01/13 05:58 AM
                                FutureCore with 4x2 or 4x3 OoO instruction decodersOok2021/01/13 10:49 AM
                          Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/10 01:52 PM
                            Tremont has 3x2 OOO instruction decoders-.-2021/01/10 09:43 PM
                            Tremont has 3x2 OOO instruction decodersDavid Kanter2021/01/10 09:55 PM
                              Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/11 01:12 PM
                                Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/11 01:56 PM
                                  Tremont has 3x2 OOO instruction decodersChester2021/01/11 06:29 PM
                                    Tremont has 3x2 OOO instruction decodersanon2021/01/11 07:27 PM
                                      Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/11 08:06 PM
                                        Tremont has 3x2 OOO instruction decodersChester2021/01/11 11:45 PM
                                          µop caches are like any other cache?Foo_2021/01/12 04:17 AM
                                            µop caches are like any other cache?Chester2021/01/12 01:14 PM
                                          Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/12 09:23 AM
                                    Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/11 07:38 PM
                                      Tremont has 3x2 OOO instruction decodersChester2021/01/11 11:06 PM
                                        Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/12 09:28 AM
                                          Paper has nothing to do with caching renameChester2021/01/12 12:54 PM
                                            Paper has nothing to do with caching renameMaynard Handley2021/01/12 01:30 PM
                                              Paper has nothing to do with caching renameChester2021/01/12 03:53 PM
                                                Paper has nothing to do with caching renameMaynard Handley2021/01/12 05:33 PM
                                                  Revolver is the design that caches rename along with other detailsMaynard Handley2021/01/12 06:08 PM
                                                    Revolver is the design that caches rename along with other detailsChester2021/01/12 07:49 PM
                                                      Revolver is the design that caches rename along with other detailsMaynard Handley2021/01/12 09:29 PM
                                                        Revolver just keeps loops within the backendChester2021/01/12 11:37 PM
                                                      Revolver is the design that caches rename along with other detailsAnon2021/01/12 11:49 PM
                                Tremont has 3x2 OOO instruction decodersWilco2021/01/11 02:07 PM
                                Tremont has 3x2 OOO instruction decodersBrett2021/01/11 02:22 PM
                                  Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/12 11:33 AM
                                    Tremont has 3x2 OOO instruction decoders2021/01/12 12:13 PM
                                      Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/12 12:39 PM
                                        Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/12 12:56 PM
                                          Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/12 02:22 PM
                                          Don't forget the P4's innovative doubled clocked staggered out of phase adder design! (NT)Jeff M2021/01/12 08:01 PM
                                        Tremont has 3x2 OOO instruction decoders2021/01/12 02:31 PM
                                          Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/12 03:38 PM
                                            Tremont has 3x2 OOO instruction decoders2021/01/12 05:15 PM
                                              Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/12 08:04 PM
                                      Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/12 02:19 PM
                                        Tremont has 3x2 OOO instruction decoders2021/01/12 03:06 PM
                                          Tremont has 3x2 OOO instruction decodersMaynard Handley2021/01/12 03:29 PM
                                            Tremont has 3x2 OOO instruction decoders2021/01/12 04:14 PM
                                        Tremont has 3x2 OOO instruction decodersstopit2021/01/13 04:47 AM
                                    metaflow execution in a configurable, loosely ordered storage fabric (traces done right)juha lainema2021/01/13 06:09 AM
                                      "Clayton-length": Am I so (in)famous?Paul A. Clayton2021/01/16 11:38 AM
                                    Tremont has 3x2 OOO instruction decodersNoSpammer2021/01/13 06:21 AM
                                      Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/13 03:19 PM
                                        Tremont has 3x2 OOO instruction decodersanon22021/01/13 09:49 PM
                                          Tremont has 3x2 OOO instruction decodersLinus Torvalds2021/01/13 10:23 PM
                                            Tremont has 3x2 OOO instruction decodersIan Ameline2021/01/15 02:24 PM
                                              Good reminder, thanks! (NT)Carson2021/01/16 11:35 AM
                                        Tremont has 3x2 OOO instruction decoders2021/01/14 11:15 AM
                                          Tremont has 3x2 OOO instruction decodersCarson2021/01/15 01:17 PM
                                            Tremont has 3x2 OOO instruction decoders2021/01/16 11:56 AM
                                Tremont has 3x2 OOO instruction decodersanon2021/01/12 02:32 AM
                                  Tremont has 3x2 OOO instruction decodersAndrei F2021/01/12 04:23 AM
                                    Tremont has 3x2 OOO instruction decodersWilco2021/01/13 07:24 AM
                                      It's not all or nothingChester2021/01/13 12:43 PM
                                        It's not all or nothingWilco2021/01/13 03:06 PM
                                          It's not all or nothingChester2021/01/13 04:54 PM
                                            It's not all or nothingAnon2021/01/13 11:27 PM
                                              It's not all or nothingChester2021/01/14 01:42 AM
                                                It's not all or nothingAnon2021/01/14 02:18 AM
                                                  It's not all or nothingChester2021/01/14 01:54 PM
                                                    It's not all or nothingAnon2021/01/14 03:01 PM
                                                      It's not all or nothingChester2021/01/14 03:45 PM
                                                        It's not all or nothingAnon2021/01/14 04:08 PM
                                                          It's not all or nothingChester2021/01/14 06:02 PM
                                                            It's not all or nothingWilco2021/01/14 08:13 PM
                                                              It's not all or nothingChester2021/01/15 02:16 PM
                                Tremont has 3x2 OOO instruction decoders2021/01/12 11:35 AM
                          Tremont has 3x2 OOO instruction decodersCarson2021/01/12 12:47 AM
                            Tremont has 3x2 OOO instruction decodersFoo_2021/01/12 04:26 AM
                              Tremont has 3x2 OOO instruction decodersCarson2021/01/14 11:11 AM
                    And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/09 11:06 PM
                      And Intel thinks Tremont has 3x2 instruction decodersanon.12021/01/10 01:27 AM
                      And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/10 03:09 AM
                        And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/10 04:14 AM
                        And Intel thinks Tremont has 3x2 instruction decodersJörn Engel2021/01/10 10:36 AM
                          And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/10 11:06 AM
                            And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/10 11:31 AM
                              And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/11 01:23 PM
                                And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/12 01:46 AM
                                  And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/12 02:03 PM
                                    And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/12 05:17 PM
                                      And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/12 05:54 PM
                                        And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/12 06:38 PM
                                          And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/12 07:05 PM
                                            And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/12 07:45 PM
                                              And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/12 08:23 PM
                            And Intel thinks Tremont has 3x2 instruction decodersJörn Engel2021/01/10 11:49 AM
                              And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/10 12:34 PM
                                And Intel thinks Tremont has 3x2 instruction decodersJörn Engel2021/01/10 01:02 PM
                                  And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/10 03:36 PM
                                    And Intel thinks Tremont has 3x2 instruction decodersMichael S2021/01/10 04:29 PM
                                      And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/11 03:25 AM
                                        And Intel thinks Tremont has 3x2 instruction decodersAnon2021/01/11 11:44 AM
                                          And Intel thinks Tremont has 3x2 instruction decodersAdrian2021/01/11 12:21 PM
                                            No trolling folks!David Kanter2021/01/11 04:49 PM
                                            ROB as the instruction cache (L-negativeOne cache)QAnon2021/01/11 07:18 PM
                                              ROB as the instruction cache (L-negativeOne cache)Maynard Handley2021/01/11 04:59 PM
                                                ROB as the instruction cache (L-negativeOne cache)Anon2021/01/11 05:19 PM
                                                  ROB as the instruction cache (L-negativeOne cache)Maynard Handley2021/01/11 05:41 PM
                                                  ROB as the instruction cache (L-negativeOne cache)anon2021/01/11 06:20 PM
                                                    ROB as the instruction cache (L-negativeOne cache)Anon2021/01/11 06:31 PM
                                                ROB as the instruction cache (L-negativeOne cache)anon2021/01/11 06:32 PM
                                                  ROB as the instruction cache (L-negativeOne cache)anon2021/01/12 04:05 AM
                    And Intel thinks Tremont has 3x2 instruction decodersMichael S2021/01/10 04:06 AM
                  And Intel thinks Tremont has3x2 instruction decodersAdrian2021/01/10 02:48 AM
                    And Intel thinks Tremont has3x2 instruction decodersDavid Kanter2021/01/10 10:27 AM
                Might not be a way to find outChester2021/01/09 03:39 PM
                  Might not be a way to find outanon2021/01/09 04:40 PM
                    Might not be a way to find outNobody2021/01/09 05:37 PM
                  Might not be a way to find outanon32021/01/10 04:38 AM
                    Might not be a way to find outanon2021/01/10 07:23 PM
                    Might not be a way to find outAnon2021/01/10 08:03 PM
                  A way to find outAndreas Abel2021/01/12 12:56 PM
                    Yeah you are rightChester2021/01/13 06:03 PM
                      Yeah you are rightLinus Torvalds2021/01/14 12:33 PM
                        Yeah you are rightChester2021/01/14 04:22 PM
                        Yeah you are rightAndreas Abel2021/01/15 07:10 PM
                      Yeah you are rightemail.delete@this.email.email2021/01/15 06:03 PM
            M1 performance & ISAChester2021/01/09 03:34 PM
          M1 performance & ISADummond D. Slow2021/01/09 11:17 AM
            M1 performance & ISAAnon2021/01/09 11:38 AM
            M1 performance & ISAFoo_2021/01/09 01:33 PM
              M1 performance & ISADummond D. Slow2021/01/09 01:44 PM
                M1 performance & ISAFoo_2021/01/09 03:16 PM
                  M1 performance & ISAChester2021/01/09 03:43 PM
                  M1 performance & ISADummond D. Slow2021/01/09 05:08 PM
                    M1 performance & ISAFoo_2021/01/10 05:59 AM
                      M1 performance & ISAAnon2021/01/10 09:20 AM
                        M1 performance & ISAFoo_2021/01/10 01:48 PM
                          M1 performance & ISAAnon2021/01/10 06:12 PM
                    M1 performance & ISAMaynard Handley2021/01/10 11:07 AM
                      M1 performance & ISADummond D. Slow2021/01/10 12:20 PM
                        M1 performance & ISAMaynard Handley2021/01/10 12:54 PM
                          M1 performance & ISADummond D. Slow2021/01/10 08:12 PM
        M1 performance & ISADavid Kanter2021/01/09 09:54 AM
          M1 performance & ISAFoo_2021/01/09 10:12 AM
            M1 performance & ISAAdrian2021/01/09 11:09 AM
              M1 performance & ISAAnon2021/01/09 11:31 AM
                IA-64 from hw perspectiveHeikki Kultala2021/01/10 02:53 AM
                  IA-64 from hw perspectiveanon22021/01/10 04:14 AM
              Actual performance is like 3-wayWilco2021/01/10 07:19 AM
                Actual performance is like 3-wayAnon2021/01/10 09:14 AM
                  Actual performance is like 3-wayWilco2021/01/10 12:13 PM
                Actual performance is like 3-wayAdrian2021/01/10 09:43 AM
            M1 performance & ISADavid Kanter2021/01/09 05:24 PM
              M1 performance & ISAanon2021/01/09 05:49 PM
                M1 performance & ISADavid Kanter2021/01/09 08:53 PM
                  M1 performance & ISAJohn H2021/01/10 10:28 AM
                    M1 performance & ISAWilco2021/01/10 11:16 AM
                    Talks to real architects that worked on x86 and ARMDavid Kanter2021/01/10 01:32 PM
                      Talks to real architects that worked on x86 and ARMMaynard Handley2021/01/10 04:13 PM
                        Talks to real architects that worked on x86 and ARMChaucer2021/01/10 05:28 PM
                          Talks to real architects that worked on x86 and ARMMaynard Handley2021/01/10 06:04 PM
                            Talks to real architects that worked on x86 and ARMEtienne Lorrain2021/01/11 03:14 AM
                              Talks to real architects that worked on x86 and ARMAdrian2021/01/11 04:02 AM
                                Talks to real architects that worked on x86 and ARMnone2021/01/11 04:17 AM
                                  Talks to real architects that worked on x86 and ARMFoo_2021/01/11 05:56 AM
                                    Talks to real architects that worked on x86 and ARMAdrian2021/01/11 06:14 AM
                                      Talks to real architects that worked on x86 and ARMFoo_2021/01/11 08:52 AM
                                      Talks to real architects that worked on x86 and ARMMaynard Handley2021/01/11 10:44 AM
                                  Talks to real architects that worked on x86 and ARMAdrian2021/01/11 05:56 AM
                                    Talks to real architects that worked on x86 and ARMnone2021/01/11 06:14 AM
                                      Talks to real architects that worked on x86 and ARMAdrian2021/01/11 06:40 AM
                                      Talks to real architects that worked on x86 and ARMEtienne Lorrain2021/01/11 06:59 AM
                                        Talks to real architects that worked on x86 and ARMAdrian2021/01/11 07:18 AM
                                          Talks to real architects that worked on x86 and ARMAdrian2021/01/11 07:33 AM
                                          Talks to real architects that worked on x86 and ARMMichael S2021/01/11 07:50 AM
                                            Talks to real architects that worked on x86 and ARMAdrian2021/01/11 08:44 AM
                          Talks to real architects that worked on x86 and ARManon2021/01/10 07:52 PM
                            Talks to real architects that worked on x86 and ARMMaynard Handley2021/01/10 08:29 PM
                              Talks to real architects that worked on x86 and ARMAnne O. Nymous2021/01/11 03:30 AM
                        Hypothetical x86-64v2?j2021/01/11 12:59 AM
                          Hypothetical x86-64v2?Anon2021/01/11 10:23 AM
                            Hypothetical x86-64v2?Anon2021/01/11 01:01 PM
                            Hypothetical x86-64v2?j2021/01/11 02:05 PM
                              Hypothetical x86-64v2?Anon2021/01/11 03:16 PM
                                Hypothetical x86-64v2?j2021/01/12 12:54 AM
                                  Hypothetical x86-64v2?Foo_2021/01/12 04:38 AM
                                    Hypothetical x86-64v2?j2021/01/12 02:10 PM
                                      Hypothetical x86-64v2?Anon2021/01/12 02:21 PM
                                        Hypothetical x86-64v2?j2021/01/12 02:41 PM
                                        Hypothetical x86-64v2?Maynard Handley2021/01/12 03:33 PM
                                        Hypothetical x86-64v2?Adrian2021/01/12 05:38 PM
                                          Hypothetical x86-64v2?Andrey2021/01/13 03:57 AM
                                            Like Nvidia?Chester2021/01/13 02:53 PM
                                              Like Nvidia?Andrey2021/01/14 03:53 AM
                                      Overflow checksFoo_2021/01/12 05:21 PM
                                        Overflow checksAnon2021/01/12 06:18 PM
                                          Overflow checksFoo_2021/01/13 03:00 AM
                                          Overflow checksAndrey2021/01/13 04:12 AM
                                  Hypothetical x86-64v2?Anon2021/01/12 02:30 PM
                          Hypothetical x86-64v2?2021/01/12 08:48 AM
                            Hypothetical x86-64v2?j2021/01/12 02:19 PM
                              Hypothetical x86-64v2?Anon2021/01/12 02:35 PM
                                Hypothetical x86-64v2?David Kanter2021/01/12 04:14 PM
                                  Hypothetical x86-64v2?Foo_2021/01/12 05:25 PM
                      Talks to real architects that worked on x86 and ARManon2021/01/10 06:37 PM
                        Talks to real architects that worked on x86 and ARMDummond D. Slow2021/01/10 08:40 PM
                        Talks to real architects that worked on x86 and ARMDavid Kanter2021/01/10 09:49 PM
                      Talks to real architects that worked on x86 and ARMjuanrga2021/01/12 03:06 AM
                        Talks to real architects that worked on x86 and ARMDummond D. Slow2021/01/12 09:18 AM
                          Talks to real architects that worked on x86 and ARMjuanrga2021/01/13 10:01 AM
                            Talks to real architects that worked on x86 and ARManonymou52021/01/13 01:12 PM
                            Talks to real architects that worked on x86 and ARMDummond D. Slow2021/01/13 07:17 PM
                        Talks to real architects that worked on x86 and ARMAnon2021/01/12 01:15 PM
                          Talks to real architects that worked on x86 and ARMjuanrga2021/01/13 11:12 AM
                      ISA performance difference [late yet still inadequate response]Paul A. Clayton2021/01/12 02:03 PM
                        ISA performance difference [late yet still inadequate response]juanrga2021/01/13 11:17 AM
                          AArch64 and x86-64 are both conventional ISAsPaul A. Clayton2021/01/16 11:38 AM
              M1 performance & ISAAdrian2021/01/10 03:44 AM
                FIRST execution has lots if much worse bottlenecksHeikki Kultala2021/01/10 04:44 AM
                  FIRST execution has lots if much worse bottlenecksFoo_2021/01/10 05:55 AM
      not to jump back on this train again or anything but...Nobody2021/01/11 05:15 PM
        not to jump back on this train again or anything but...Chester2021/01/11 06:45 PM
          not to jump back on this train again or anything but...Nobody2021/01/11 06:50 PM
          not to jump back on this train again or anything but...Adrian2021/01/12 04:25 AM
        not to jump back on this train again or anything but...Adrian2021/01/12 03:51 AM
          not to jump back on this train again or anything but...Foo_2021/01/12 04:50 AM
            not to jump back on this train again or anything but...Michael S2021/01/12 08:18 AM
              not to jump back on this train again or anything but...Foo_2021/01/12 10:06 AM
                not to jump back on this train again or anything but...Michael S2021/01/12 10:50 AM
                  not to jump back on this train again or anything but...Foo_2021/01/12 11:02 AM
                    not to jump back on this train again or anything but...Michael S2021/01/12 12:41 PM
                  not to jump back on this train again or anything but...Maynard Handley2021/01/12 12:13 PM
          not to jump back on this train again or anything but...Gionatan Danti2021/01/12 11:42 AM
            not to jump back on this train again or anything but...Michael S2021/01/12 12:48 PM
              not to jump back on this train again or anything but...Gionatan Danti2021/01/12 02:11 PM
                not to jump back on this train again or anything but...Adrian2021/01/12 05:58 PM
                  not to jump back on this train again or anything but...Michael S2021/01/13 04:18 AM
                    not to jump back on this train again or anything but...Adrian2021/01/13 07:19 AM
                      not to jump back on this train again or anything but...Gionatan Danti2021/01/15 01:02 AM
        not to jump back on this train again or anything but...Wilco2021/01/12 04:02 AM
    x86 has done NOTHING to kill VLIW.Heikki Kultala2021/01/09 01:47 AM
      x86 has done NOTHING to kill VLIW.dmcq2021/01/10 06:57 AM
      x86 has done NOTHING to kill VLIW.Rayla2021/01/10 08:13 PM
  M1 performancejoema2021/01/10 06:35 AM
    M1 performancedmcq2021/01/10 10:37 AM
      M1 performancedmcq2021/01/10 10:52 AM
    piednols video has quite a lot of garbageHeikki Kultala2021/01/10 11:06 AM
Reply to this Topic
Name:
Email:
Topic:
Body: No Text
How do you spell avocado?