By: James (no.delete@this.thanks.invalid), March 20, 2021 11:24 am
Room: Moderated Discussions
Hugo Décharnes (hdecharn.delete@this.outlook.fr) on March 20, 2021 7:34 am wrote:
> Reducing the number of registers, or going for more exotic in-core storage is impossible
> too. (This would be particularly useful for big cores, where the renaming is highly congested, and having
> fewer registers would reduce that pressure.)
Given that x86-64 went from eight GPRs to sixteen (and the x86-64 architects credited that for up to 10% performance improvement, IIRC), and Aarch64 went from sixteen to thirty-two, reducing the number of registers for higher performance is unlikely to be helpful.
> Reducing the number of registers, or going for more exotic in-core storage is impossible
> too. (This would be particularly useful for big cores, where the renaming is highly congested, and having
> fewer registers would reduce that pressure.)
Given that x86-64 went from eight GPRs to sixteen (and the x86-64 architects credited that for up to 10% performance improvement, IIRC), and Aarch64 went from sixteen to thirty-two, reducing the number of registers for higher performance is unlikely to be helpful.
