Anon (no.delete@this.spam.com) on March 23, 2021 8:16 am wrote:
> Heikki Kultala (heikki.kultal.a.delete@this.gmail.com) on March 22, 2021 5:47 pm wrote:
> > Makes no sense. This data would be available only after reading the metadata bit from the register.
> >
> > We want to be able to fully decode the instruction as early as possible. Requiring
> > to do a register read before finishing decoding would be a big hindurance.
>
> No, really. We want to know the exactly opcode only when the instruction is ready to execute,
> ie: when data is available, so if the size comes with the data that is no big deal.
>
> What you want to know as earlier as possible is which unit may execute that
> instruction, that is, if it is ALU, MUL, LD, etc, but the information of weather
> the instruction is signed/unsigned or its size may wait for execution.
>

In the worst cases, an instruction's operand size might change major properties like
latency or uop sequencing. These are things that should be known earlier than execution.
Many of the cases may involve FP or SIMD registers, but complex scalar integer instructions,
such as multiplication and division, may also use size-dependent latency or microcoding.