NoSpammer (no.delete@this.spam.com) on March 26, 2021 8:46 pm wrote:
> anon (anon.delete@this.anon.anon) on March 26, 2021 3:39 pm wrote:
> > The 14++++++++ and others drama don't really matter, from a practical point of view.
> > So Intel screwed up more because it refused to invest into delivering lower
> > nodes when others did, rather than because of not being able to.
>
> Intel screwed up because they were relying on something in the process (we don't know exactly what) to work
> but if failed to work, and apparently the same thing (or a combination) derailed the next process as well.
>
> > TSMC, Samsung did an equal awesome feat, by leveraging the current EUV scanners.
> > Being an EUV early adopter was not an easy task, still engineers managed to mass produce 7nm and 5nm nodes.
> > However, current EUV scanners cannot leverage decently sub 5nm
> > nodes, without scarifying even more yields and quantities.
>
> No, really? How about:
> - computational lithography
> - better resists
> - better methods to fix rough edges
> - vertical transistors
> - after all node nm is just a number
>
> > Now, which company would get more of these next generation scanners from ASML?
> > I suspect that Intel put some effort into developing the new High-NA scanners,
> > masks, films to better fit its EUV mass production standards.
> > Meanwhile, TSMC and Samsung still need to capitalize on their current generation of machines.
>
> Yes, sure, so after overtaking Intel in R&D they went into bean
> counting mode so that Intel can overtake them. Haahaha.
>
> > So i would lend toward Intel having the priority at ASML, over TSMC or Samsung.
>
> That certainly will not happen unless ASML get an offer they cannot refuse.
>
> > Time will tell if Intel can keep it up, or if everything was really a screw-up.
> > As far we want to criticize, until now, on paper, Intel is in good shape despite everything.
>
> I have my suspicion (if they are anything like paranoid now) that they have one or two microarchitectures
> in development for TSMC production, too. At least that's what I would do if I were Pat.
>



Intel, TSMC and Samsung were relying on the same thing, trying to get decent manufacturing capabilities on smaller nodes, out of a new technological process.
All signed an agreement to develop EUV with ASML, a long time ago now and were on the same ship.
The fact that a venture of big companies, ended up having each one of them at different technological levels, in less than 4 years, should ring a bell.


In my opinion, it shows how much work, money and development time it really takes, to bring EUV technology successful.
And maybe, not everyone is willing or is able to dedicate so many resources into a constant evolving technology.
Which fit our actual semiconductor model, we are able to afford leading silicon tech.
But with increased costs, more validation work and limited quantities on very good chips.


Going down from a 193nm to a 13nm light source is a real physical challenge, at least by my scientific knowledge.
Even if the process core idea stay the same, a lot of manufacturing components need to be adjusted to fit the new light source wavelength.
So improving the process is not a straight forward thing and required a lot of effort put into
Which is not an issue for researchers and engineers, but it is 'the issue', if you run a company for profit.


And i'm not saying that future improvement on masks and resists, would not make current generation scanners better.
From a technological level point of view, if the next EUV machine comes out with many fundamentals changes, on how it is built.
This only four years after the first batch of scanners came out, it tells me that these changes were needed to allow sub 5nm nodes to be at least successful as 7nm and 5nm are.


Also, Intel could have even more architectural updates than we think, under the hood.
After all these years of R&D, it would be the bare minimum, i guess.
Money was never a problem, so Intel needs to find a better excuse for that, if it fails!