What is next after DDR5?

By: Doug S (foo.delete@this.bar.bar), March 27, 2021 5:18 pm
Room: Moderated Discussions
Brett (ggtgp.delete@this.yahoo.com) on March 27, 2021 4:27 pm wrote:
> Ganon (anon.delete@this.gmail.com) on March 25, 2021 5:56 pm wrote:
> > My prediction for the immediate future is similar to what is happening today already.
> > Not everyone buys the SKUs with the most core count: it would be silly to pay for cores roughly
> > beyond what you need to saturate the memory bandwidth in aggregate for your workload.
> > DDR5 will allow you to use effectively 2x the core count because it will eventually result in
> > ~2x bandwidth (3200 -> 6400 and bandwidth efficiency improvements). Not sure what will happen
> > after DDR5 though.
> >
> > Don't think a L4 is cost-effective, though IBM does have it in their mainframes. You would probably
> > better off buying 2+ machines with modest core count and
> > DDR5, rather than 1 complex one with L4 cache, HBM, etc.
>
> RAM on die covers multiple markets, with and without external DRAM.
> Higher peak performance, being 5% faster means you can charge twice as much.
> Higher usable cores per socket, for many use cases.
> More sockets (8) without DRAM for higher rack density, at less power per compute.
> You could also do a shared DDR bank with say four sockets, using an existing chiplet
> north bridge. (Special chip carrier with four dies and north bridge.)
>
> The same die is used whether or not you hook DDR to the die.
> You just give the on die RAM a different name, L4, if DDR is connected.
> L4 is slightly more complex than flat on chip RAM, but the size difference is trivial
> so costs dictate one design. A large page size would be preferable for on chip RAM.
>
> The key to shoot me down is whether or not a reasonable amount of RAM
> can fit on a reticle limited die, I would say 16 gigs is enough.


You can't make standard DRAM on a logic process, you have to use eDRAM which is much less dense than trenched DRAM.

You'd probably be hard pressed to fit 16 gigaBITS of eDRAM onto a reticle limited die on N5. No chance in hell of 16 gigabytes.
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  5nm the end of DRAM?Brett2021/03/25 05:17 PM
    What is next after DDR5?Ganon2021/03/25 05:56 PM
      What is next after DDR5?wumpus2021/03/26 09:10 AM
        What is next after DDR5?Brett2021/03/26 04:39 PM
          What is next after DDR5?wumpus2021/03/28 10:44 AM
      What is next after DDR5?Brett2021/03/27 04:27 PM
        What is next after DDR5?Doug S2021/03/27 05:18 PM
      What is next after DDR5?Anononymous Coward2021/03/30 07:03 AM
        What is next after DDR5?Andrey2021/03/30 09:09 AM
          What is next after DDR5?David Hess2021/04/04 08:52 PM
      What is next after DDR5?David Hess2021/04/04 08:45 PM
        What is next after DDR5?Doug S2021/04/05 06:57 AM
          What is next after DDR5?David Hess2021/04/05 10:45 AM
          Same costAnon2021/04/05 11:31 AM
            Same costDavid Hess2021/04/05 08:26 PM
            Same costMaxwell2021/04/06 07:17 PM
              Same costDavid Hess2021/04/07 02:35 PM
          What is next after DDR5?wumpus2021/04/07 09:06 AM
      L4 is not a memory technologyHeikki Kultala2021/04/07 12:38 PM
        DRAM cachewumpus2021/04/08 08:24 AM
        Intel iGPU memory was eDRAM, not SRAMMark Roulo2021/04/08 11:31 AM
          I am not talking about the eDRAM. I am talking about the cache that is L3 for CPUHeikki Kultala2021/04/08 11:09 PM
            I am not talking about the eDRAM. I am talking about the cache that is L3 for CPURobert Williams2021/04/09 11:24 AM
              This STILL has NOTHING to do with the eDRAM. I am talking about the SRAM LLCHeikki Kultala2021/04/09 12:57 PM
                This STILL has NOTHING to do with the eDRAM. I am talking about the SRAM LLC---2021/04/09 01:40 PM
    5nm the end of DRAM?Rayla2021/03/26 09:28 AM
      5nm the end of DRAM?riy2021/04/08 06:26 AM
        5nm the end of DRAM?Michael S2021/04/08 11:51 AM
    5nm the end of DRAM?Doug S2021/03/26 09:52 AM
      5nm the end of DRAM?wumpus2021/04/07 09:10 AM
        5nm the end of DRAM?Robert Williams2021/04/07 11:05 AM
    Totaly misunderstanding of DDR SDRAM memory interfaces and DRAMHeikki Kultala2021/04/07 12:36 PM
      Totaly misunderstanding of DDR SDRAM memory interfaces and DRAManonymou52021/04/07 01:13 PM
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