By: Foo_ (foo.delete@this.nomail.com), March 30, 2021 1:31 pm
Room: Moderated Discussions
Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on March 30, 2021 1:27 pm wrote:
> Jon Masters (jcm.delete@this.jonmasters.org) on March 30, 2021 11:41 am wrote:
> > https://www.arm.com/why-arm/architecture/cpu
>
> Interesting that they're pulling in both SVE2 and transactional memory.
Quoting this page:
"One of the most promising uses of Transactional Memory is known as Transactional Lock Elision (TLE), which allows existing regions of code, protected by locks, to be executed concurrently within a transaction. This happens with no modification to the multi-threaded program, and only falls back to the less optimal lock-taking path if the hardware detects a conflict within the transaction."
-> What is the likelihood of ARM succeeding here where Intel failed (and while AMD seems completely uninterested)?
> Jon Masters (jcm.delete@this.jonmasters.org) on March 30, 2021 11:41 am wrote:
> > https://www.arm.com/why-arm/architecture/cpu
>
> Interesting that they're pulling in both SVE2 and transactional memory.
Quoting this page:
"One of the most promising uses of Transactional Memory is known as Transactional Lock Elision (TLE), which allows existing regions of code, protected by locks, to be executed concurrently within a transaction. This happens with no modification to the multi-threaded program, and only falls back to the less optimal lock-taking path if the hardware detects a conflict within the transaction."
-> What is the likelihood of ARM succeeding here where Intel failed (and while AMD seems completely uninterested)?