Foo_ (foo.delete@this.nomail.com) on March 30, 2021 1:31 pm wrote:
> Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on March 30, 2021 1:27 pm wrote:
> > Jon Masters (jcm.delete@this.jonmasters.org) on March 30, 2021 11:41 am wrote:
> > > https://www.arm.com/why-arm/architecture/cpu
> >
> > Interesting that they're pulling in both SVE2 and transactional memory.
>
> Quoting this page:
>
> "One of the most promising uses of Transactional Memory is known as Transactional Lock Elision (TLE),
> which allows existing regions of code, protected by locks, to be executed concurrently within a transaction.
> This happens with no modification to the multi-threaded program, and only falls back to the less optimal
> lock-taking path if the hardware detects a conflict within the transaction."
>
> -> What is the likelihood of ARM succeeding here where Intel
> failed (and while AMD seems completely uninterested)?
>

I seem to remember something about their first proposal for TM coming a cropper when someone pointed out that it wouldn't work with their memory model. I think that was when they started taking their memory model really seriously, so I'd guess they now have that particular problem in hand. There's the experience of IBM and Intel to draw on too. It'll be interesting seeing if they can make it all worthwhile though!