By: Ben LaHaise (bcrl.delete@this.kvack.org), April 13, 2021 3:32 pm
Room: Moderated Discussions
Dan Fay (daniel.fay.delete@this.gmail.com) on April 13, 2021 12:03 pm wrote:
> FWIW, the dual-core STM32H7 microcontrollers have a series of hardware semaphores. It looks like the
> hardware semaphore block can notify one of the cores when a semaphore is freed via an interrupt.
We're trying to reduce locking overhead, not increase it! Interrupts are way too expensive.
If you're looking for an approach that is proven to work, Cavium's Octeon has hardware work item scheduling that also provides some mutex-like functionality with tag bits iirc (sorry, my memory is not 100% on the Cavium terminology as it's been a few years since I looked at it). Basically, the hardware will prvent scheduling a work item when the tag conflicts with another work item that is already running. This approach pays dividends, as most work functions can now completely avoid taking locks, making for high performance with low overhead.
-ben
> FWIW, the dual-core STM32H7 microcontrollers have a series of hardware semaphores. It looks like the
> hardware semaphore block can notify one of the cores when a semaphore is freed via an interrupt.
We're trying to reduce locking overhead, not increase it! Interrupts are way too expensive.
If you're looking for an approach that is proven to work, Cavium's Octeon has hardware work item scheduling that also provides some mutex-like functionality with tag bits iirc (sorry, my memory is not 100% on the Cavium terminology as it's been a few years since I looked at it). Basically, the hardware will prvent scheduling a work item when the tag conflicts with another work item that is already running. This approach pays dividends, as most work functions can now completely avoid taking locks, making for high performance with low overhead.
-ben
