Wilco (wilco.dijkstra.delete@this.ntlworld.com) on April 8, 2021 8:14 am wrote:
> none (none.delete@this.none.com) on April 8, 2021 6:47 am wrote:
> > anon2 (anon.delete@this.anon.com) on April 8, 2021 2:08 am wrote:
> > > none (none.delete@this.none.com) on April 8, 2021 1:53 am wrote:
> > > > anon2 (anon.delete@this.anon.com) on April 8, 2021 1:16 am wrote:
> > > > [...]
> > > > > Wrong. It's always been about performance primarily.
> > > > >
> > > > > > The tax is about how a better
> > > > > > ISA like A64 allows using less transistors than x86 to do the same work. So you can achieve
> > > > > > the same performance on a smaller size or achieve more performance using the same size,
> > > > > > or a combination of both: e.g. ~10% higher performance and ~10% smaller design.
> > > > > >
> > > > > > If you read the quote given. TX3 gets a similar performance with a 20 or 30% smaller size.
> > > > >
> > > > > It's about performance lol, don't try to weasel your way out of it. Of course performance is
> > > > > also related to size in some ways, so transitively they are related. But you came out like a
> > > > > moron and blurted out x86 tax is not about performance, as though that somehow addressed my tongue
> > > > > in cheek quip any better than your dishonest and stupid comparison of shipping cores.
> > > > >
> > > > > The x86 tax was always "about" performance. Sorry to break it to you. It was
> > > > > about performance when RISCs were taking performance crowns. It was about performance
> > > > > when Intel couldn't match ARM performance in smartphone space.
> > > >
> > > > In the context of smartphone, the tax was clearly about efficiency, not about performance.
> > >
> > > Performance/watt, yes of course.
> > >
> > > Not size.
> >
> > You were talking about performance primarily, so I just wanted to add another dimension.
> > And there's a relation between size and power consumption (though Intel and AMD have been
> > getting better at clock and power gating).
> >
> > I think what people call the x86 tax is more complex than a single thing, size or
> > performance.
>
> Absolutely, it's a lot more than "a little more complex decode" as people often incorrectly
> claim. Having to use desktop cores in servers is a result of x86 complexity. Even AVX-512
> can be considered a tax compared to modern alternatives like SVE.
>
> For x86 servers, area is really the largest issue. AMD solved it smartly by using chiplets, but the amount of
> silicon they need for equivalent performance is even larger. The 8380 die size is claimed to be ~640mm^2. A
> single core plus 1.5MB L3 slice is around 9.6mm^2 - Neoverse N1 is 1.4mm^2 excluding L3. This is why Ampere Altra
> (Max) can use a much smaller die and still fit 2-3 times as many cores and end up significantly faster.
>
> Wilco

It's high frequency design, not x86 per se that is the cause of increase area. Area doesn't increase dynamic power, its activity of transistors. While frequency increases power on the same design, you can't use that to compare two different designs because a design with more gates per clock cycle will need a higher voltage to hit the same frequency, burning quadratically more power. Rome is in its efficient zone at say 2.5-3,5GHz zone, whereas the ARM core in AMpere Altra is operating at the worst corner of v-f curve at 3.3GHz. i.e. rome is using lower voltages to hit the same frequency. So you have it where, for the roughly same spec rate score compared to zen2, the 80c altra burns roughly same power despite Zen having a 14nm IOD, off-die comm links for the CCD-IOD interconnect, etc. In other words, the CCD is more efficient, making up for the inefficiency of the IOD. Also, Rome has the same amount of cache on a single chiplet as Ampere has on its entire die. Spec rate doesn't care (can't fit) and neither does namd (small footprint), but clearly things like specjbb, arguably the only server workload in AT's Icelake review, do care.