Another boring SIMD yes

By: Heikki Kultala (heikki.kultala.delete@this.gmail.com), April 17, 2021 9:31 am
Room: Moderated Discussions
Anon (no.delete@this.spam.com) on April 16, 2021 4:51 pm wrote:
> LoongShot (Lsx.delete@this.lasx.com) on April 16, 2021 3:01 pm wrote:
> > Big week for ISAs - LoongArch
>
> Will it be another boring RISC?

Yes.

RISC with 32-bit long instructions, 32 integer regs and 32 FP/vector regs, with 256-bit SIMD.

Instruction encoding is totally different than MIPS (more instruction formats) but (almost) all MIPS instructions can be translated to exactly one LoongArch instruction.
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LoongArchLoongShot2021/04/16 03:01 PM
  LoongArchdmcq2021/04/16 03:25 PM
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        LoongArchGabriele Svelto2021/04/17 07:07 AM
          LoongArchAriadne Conill2021/04/17 03:22 PM
    Please discuss politics elsewhere (NT)Foo_2021/04/17 03:27 AM
  LoongArchDuane Sand2021/04/16 04:11 PM
  LoongArchAnon2021/04/16 04:51 PM
    LoongArchMark Roulo2021/04/16 05:52 PM
      LoongArchdmcq2021/04/17 10:23 AM
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        LoongArch---2021/04/18 08:53 AM
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            LoongArchMarcus2021/04/19 07:07 AM
              LoongArchdmcq2021/04/19 01:07 PM
    LoongArchAriadne Conill2021/04/16 10:53 PM
      LoongArchMarcus2021/04/17 01:42 AM
        LoongArchAriadne Conill2021/04/17 03:19 PM
    Another boring SIMD yesHeikki Kultala2021/04/17 09:31 AM
      Another boring SIMD yesGabriele Svelto2021/04/19 12:39 AM
        Another boring SIMD yesdmcq2021/04/19 02:00 AM
      Another boring RISC I mean (NT)Heikki Kultala2021/04/19 05:41 AM
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