By: Per Hesselgren (perhesselgren.delete@this.yahoo.se), April 29, 2021 8:44 am
Room: Moderated Discussions
Is there anything like an optimal pipelength?
Looking at Pentium it was using 4 steps and 5 on Pentium MMX.
It was not longer on Pentium Pro or AMD K5 and K6.
Now Intel and AMD are on 18-19 but ARM64 only on 11-12.
Converting x86_64 to something better should take some steps- but how many?
Looking at Pentium it was using 4 steps and 5 on Pentium MMX.
It was not longer on Pentium Pro or AMD K5 and K6.
Now Intel and AMD are on 18-19 but ARM64 only on 11-12.
Converting x86_64 to something better should take some steps- but how many?
Topic | Posted By | Date |
---|---|---|
Optimal pipelength | Per Hesselgren | 2021/04/29 08:44 AM |
Optimal pipelength | Chester | 2021/04/29 09:18 AM |
Optimal pipelength | Per Hesselgren | 2021/04/29 11:02 AM |
Optimal pipelength | Chester | 2021/04/29 11:21 AM |
Optimal pipelength | Anon | 2021/04/29 10:22 AM |
Optimal pipelength | Chester | 2021/04/29 11:16 AM |
Optimal pipelength | Carson | 2021/04/29 11:20 PM |
Optimal pipelength | Michael S | 2021/04/30 03:23 AM |
fast mispredict recovery | Chester | 2021/04/30 03:44 AM |
fast mispredict recovery | anon | 2021/04/30 08:25 AM |
Checkpointing | David Kanter | 2021/04/30 10:52 AM |
fast mispredict recovery | --- | 2021/05/01 08:10 AM |
MIPS R10000 (1996) used RAT checkpointing (NT) | Paul A. Clayton | 2021/05/01 09:07 AM |
MIPS R10000 (1996) used RAT checkpointing | anon | 2021/05/01 10:09 AM |
MIPS R10000 (1996) used RAT checkpointing | --- | 2021/05/01 10:44 AM |
fast mispredict recovery | Gionatan Danti | 2021/05/01 12:34 PM |
fast mispredict recovery | Chester | 2021/05/01 02:01 PM |
fast mispredict recovery | anon | 2021/05/02 12:52 AM |
fast mispredict recovery | Gionatan Danti | 2021/05/02 03:26 AM |