IBM's "2nm" Gate-all-around - will it matter?

By: Mark Roulo (, May 10, 2021 6:55 pm
Room: Moderated Discussions
David Kanter ( on May 10, 2021 6:26 pm wrote:
> I don't know how many of you saw this, but IBM recently announced that they have a gate-all-around process:
> I spent a bit of time talking with Stephen and I think he captured the situation well.
> It's clear that Intel, Samsung, and TSMC already have Gate all around processes under
> developement. IBM has completed the research phase, but they don't do their own production
> any more and GF has kind of given up. So they need to find a customer.
> I'm not sure who would be interested. The memory folks will have a very different process flow and
> may not need GAA for years. SMIC probably wouldn't be allowed to license. Who else is out there?
> I'm curious about the dielectric underneath, I'm hoping we will see a VLSI or IEDM paper on this.
> David

Can this sort of technology be "back ported" to previous design nodes? Could GloFo use in on the current GloFo 12(?) nm design rules to build something more like an effective 10 nm (or whatever) node?

Or does this not work?
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TopicPosted ByDate
IBM's "2nm" Gate-all-around - will it matter?David Kanter2021/05/10 05:26 PM
  IBM's "2nm" Gate-all-around - will it matter?John H2021/05/10 06:20 PM
  IBM's "2nm" Gate-all-around - will it matter?Mark Roulo2021/05/10 06:55 PM
  IBM's "2nm" Gate-all-around - will it matter?Anon2021/05/10 08:08 PM
  IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/10 09:34 PM
  IBM's "2nm" Gate-all-around - will it matter?Etienne Lorrain2021/05/10 11:49 PM
    IBM's "2nm" Gate-all-around - will it matter?David Hess2021/05/11 04:05 AM
    structured ASICsDavid Kanter2021/05/11 06:08 AM
    IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/11 07:05 AM
      IBM's "2nm" Gate-all-around - will it matter?Kester L2021/05/11 07:22 AM
        IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/11 10:31 AM
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