IBM's "2nm" Gate-all-around - will it matter?

By: David Hess (, May 11, 2021 4:05 am
Room: Moderated Discussions
Etienne Lorrain ( on May 11, 2021 12:49 am wrote:
> Completely candid question, just software engineer here...
> Would it be possible for a big company (big investment) to produce a chip "full of transistors", i.e. a regular
> pattern - but without connection in between those transistors - and then for a smaller company (smaller investment)
> to rework the chip by adding the wires, only adding conducting material, to produce what they need?
> I understand all transistors are not equals; power, clocks and data wires may be different,
> and that solutions for wires crossing should be designed, but it would probably be
> a lot better than FPGAs - maybe reaching current processor performance?
> What are the main problems with this approach?

Mask programmed ICs have been a thing for decades.
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TopicPosted ByDate
IBM's "2nm" Gate-all-around - will it matter?David Kanter2021/05/10 05:26 PM
  IBM's "2nm" Gate-all-around - will it matter?John H2021/05/10 06:20 PM
  IBM's "2nm" Gate-all-around - will it matter?Mark Roulo2021/05/10 06:55 PM
  IBM's "2nm" Gate-all-around - will it matter?Anon2021/05/10 08:08 PM
  IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/10 09:34 PM
  IBM's "2nm" Gate-all-around - will it matter?Etienne Lorrain2021/05/10 11:49 PM
    IBM's "2nm" Gate-all-around - will it matter?David Hess2021/05/11 04:05 AM
    structured ASICsDavid Kanter2021/05/11 06:08 AM
    IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/11 07:05 AM
      IBM's "2nm" Gate-all-around - will it matter?Kester L2021/05/11 07:22 AM
        IBM's "2nm" Gate-all-around - will it matter?Adrian2021/05/11 10:31 AM
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